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micron MT35XU01GBBA2G12-0AUT

Produttore
Cod. Prod.
MT35XU01GBBA2G12-0AUT
Cod. LCSC
C5813083
Imballo
TPBGA-24(6x8)
Numero Cliente
Attr. chiave
1Gbit 1.7V~2V 200MHz SPI TPBGA-24(6x8) Memory RoHS
Scheda Tecnicamicron MT35XU01GBBA2G12-0AUT
Conformità RoHS1 documenti disponibili
Parti alternative10
Esaurito
Avvisami
Minimo: 1Multiplo: 1Unità di vendita: Piece
Aggiungi alla Lista BOM
QtàPr. unit.(Solo per riferimento)Importo totale
1+$ 24.0802$ 24.08
200+$ 9.609$ 1921.80
500+$ 9.2883$ 4644.15
1,122+$ 9.1287$ 10242.40
Package Standard1122/Full Tray
Prezzo migliore per quantità maggiore?
$

Specifiche del Prodotto

Tutto
TipoDescrizione
CategoriaIntegrated Circuits (ICs)/Memory/Memory
Produttoremicron
ImballoTPBGA-24(6x8)
Operating Temperature-40℃~+125℃
FeaturesWrite enable latch;Hardware write protection;Software write protection;Absolute write protection
Memory Size1Gbit
Voltage - Supply1.7V~2V
Program / Erase Cycles100,000 cycles
Clock Frequency200MHz
Data Retention - TDR (Year)20 Years
Block Erase Time(tBE)-
Write Cycle Time(tWC)-
Page Programming Time (Tpp)-
Standby Supply Current-
InterfaceSPI

Caratteristiche

Traduzione AI
  • SPI-compatible Xccela™ bus interface – Octal DDR protocol – Extended-SPI protocol with octal commands
  • Single and double transfer rate (SDR/DDR)
  • Clock frequency:
    • 166 MHz (MAX) in SDR (166 MB/s) (1.8V)
    • 200 MHz (MAX) in DDR (400 MB/s) with DQS (1.8V)
    • 133 MHz (MAX) in SDR (133 MB/s) (3.0V)
    • 133 MHz (MAX) in DDR (266MB/s) with DQS (3.0V)
  • Execute-in-place (XIP)
  • PROGRAM/ERASE SUSPEND operations
  • Volatile and nonvolatile configuration settings
  • Software reset
  • Reset pin available
  • 3-byte and 4-byte address modes – enable memory access beyond 128Mb
  • Dedicated 64-byte OTP area outside main memory – Readable and user-lockable – Permanent lock with PROGRAM OTP command
  • Erase capability Bulk erase for monolithic, die erase for stacked devices – Sector erase 128KB uniform granularity Subsector erase 4KB, 32KB granularity
  • Security and write protection
    • Volatile and nonvolatile locking and software write protection for each 128KB sector
    • Nonvolatile configuration locking and password protection
    • Protection management register offering enhanced security features
    • Hardware write protection: nonvolatile bits (BP[3:0] and TB) define protected area size
    • Program/erase protection during power-up
    • CRC detects accidental changes to raw data
  • Electronic signature
    • JEDEC-standard 3-byte signature
    • Extended device ID: two additional bytes identify device factory options
  • JESD47I-compliant
    • Minimum 100,000 ERASE cycles per sector
    • Data retention: 20 years (TYP)
  • Options Marking
    • Voltage
      • 1.7–2.0V U
      • 2.7–3.6V L
    • Density
      • 256Mb 256
      • 512Mb 512
      • 1Gb 01G
      • 2Gb 02G
    • Device stacking
      • Monolithic A
      • 2 die stacked B
      • 4 die stacked C
    • Device Generation B
    • Die revision A
    • Configuration
      • Boot in SDR x1 1
      • Boot in DDR x8 2
    • Sector Size
      • 128KB G
    • Packages: JEDEC-standard, RoHS-compliant
      • 24-ball T-PBGA 05/6mm x 8mm 12 (5 x 5 array)
    • Security features
      • Standard security 0
    • Special options
      • Standard S
      • Automotive A
    • Operating temperature range
      • From -40℃ to +85℃ IT
      • From -40℃ to +105℃ AT
      • From -40℃ to +125℃ UT

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MT35XU01GBBA1G12-0SIT TRmicronTPBGA-24(6x8)0$ 33.864
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