LCSC Electronics logoLCSC Electronics svg logo
Zaloguj
USD
TI SN74LVC1G79DBVR product image
  • SN74LVC1G79DBVR thumbnail 1
  • SN74LVC1G79DBVR thumbnail 2
  • SN74LVC1G79DBVR thumbnail 3
  • Rozmieszczenie wyprowadzeń
  • Footprint
Zdjęcia poglądowe

TI SN74LVC1G79DBVR

Producent
Nr części prod.
SN74LVC1G79DBVR
Nr LCSC
C42878
Opak.
SOT-23-5
Numer Klienta
Klucz. cechy
Single Positive-Edge-Triggered D-Type Flip-Flop
Karta KatalogowaTI SN74LVC1G79DBVR
Zgodność z RoHS2 dokumentów dostępnych
Na stanie: 4,280
4,280 W magazynie, wysyłka natychmiastowa
Minimum: 5Wielokrotność: 5Jednostka sprzedaży: Piece
Dodaj do Listy BOM
Szt.Cena jedn.Suma całkowita
5+$ 0.1963$ 0.98
50+$ 0.1576$ 7.88
150+$ 0.1411$ 21.17
500+$ 0.1204$ 60.20
3,000+$ 0.1037$ 311.10
6,000+$ 0.0982$ 589.20
Standardowa Obudowa3000/Full Reel
Lepsza cena za większą ilość?
$

Specyfikacje Produktu

Wszystko
TypOpis
KategoriaIntegrated Circuits (ICs)/Logic/Flip Flops
ProducentTI
Opak.SOT-23-5
Voltage - Supply1.65V~5.5V
Number of Bits per Element1
Output TypePush-Pull
Operating Temperature-40℃~+125℃
Series74LVC Series
Synchronous/Asynchronous-
Number of Elements1
Current - Output High(IOH)32mA
Current - Output Low(IOL)32mA
Setup Time1.3ns
Quiescent Current10uA
Hold Time1ns
Propagation Delay4.5ns@5V,50pF
Trigger TypeRising Edge

Opis

Tłumaczenie AI

The SN74LVC1G79 device is a single positive-edge-triggered D-type flip-flop that is designed for 1.65-V to 5.5-V VCC operation.

When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the level at the output.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

Funkcje

Tłumaczenie AI
  • Available in the Texas Instruments NanoFree™ Package
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22:
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5V
  • Supports Down Translation to VCC
  • Max tpd of 6 ns at 3.3V and 50 pF load
  • Low Power Consumption, 10 - μA Max ICC
  • ±24 - mA Output Drive at 3.3V
  • Ioff supports Partial-Power-Down Mode and Back-Drive Protection

Zastosowania

Tłumaczenie AI
  • Test and Measurement
  • Enterprise Switching
  • Telecom Infrastructure
  • Personal Electronics
  • White Goods