TI COP8SGE744V8/NOPB

The COP8SG Family ROM and OTP based microcontrollers are highly integrated COP8™ Feature core devices with 8k to 32k memory and advanced features including Analog comparators, and zero external components. These single-chip CMOS devices are suited for more complex applications requiring a full featured controller with larger memory, low EMI, two comparators, and a full-duplex USART. COP8SGx7 devices are 100% form-fitfunction compatible OTP (One Time Programmable) versions for use in production or development of the COP8SGx5 ROM. Erasable windowed versions (Q3) are available for use with a range of COP8 software and hardware development tools. Family features include an 8-bit memory mapped architecture, 15 MHz CKI with 0.67 µs instruction cycle, 14 interrupts, three multi-function 16-bit timer/counters with PWM, full duplex USART, MICROWIRE/PLUS™, two analog comparators, two power saving HALT/IDLE modes, MIWU, idle timer, on-chip R/C oscillator, high current outputs, user selectable options ( WATCHDOG™, 4 clock/oscillator modes, power-on-reset), 2.7V to 5.5V operation, program code security, and 28/40/44 pin packages.

• Low Cost 8-Bit Microcontroller
• Quiet Design (Low Radiated Emissions)
• Multi-Input Wakeup Pins with Optional Interrupts (8 pins)
• Mask Selectable Clock Options – Crystal Oscillator
• Crystal Oscillator Option with On-Chip Bias Resistor
• External Oscillator
• Internal R/C Oscillator
• Internal Power-On-Reset—User Selectable
• WATCHDOG and Clock Monitor Logic—User Selectable
• Eight High Current Outputs
• 256 or 512 Bytes On-Board RAM
• 8k to 32k ROM or OTP EPROM with Security Feature
• Versatile Easy to Use Instruction Set
• 0.67 µs Instruction Cycle Time
• Fourteen Multi-Source Vectored Interrupts Servicing
• External Interrupt / Timers T0 — T3
• MICROWIRE/PLUS™ Serial Interface
• Multi-Input Wake Up
• Software Trap
• USART (2; 1 Receive and 1 Transmit)
• Default VIS (Default Interrupt)
• 8-Bit Stack Pointer SP (Stack in RAM)
• Two 8-bit Register Indirect Data Memory Pointers
• True Bit Manipulation
• BCD Arithmetic Instructions
• Multi-Input Wakeup Logic
• Three 16-bit timers (T1 — T3), each with two 16-bit registers supporting: Processor Independent PWM mode, External Event Counter mode, Input Capture mode
• Idle Timer (T0)
• MICROWIRE/PLUS Serial Interface (SPI Compatible)
• Full Duplex USART
• Two Analog Comparators
• Software Selectable I/O Options (TRI-STATE Output, Push-Pull Output, Weak Pull-Up Input, and High Impedance Input)
• Schmitt Trigger Inputs on Ports G and L
• Eight High Current Outputs
• Packages: 28 SOIC with 24 I/O pins, 40 PDIP with 36 I/O pins, 44 PLCC, LQFP and WQFN with 40 I/O pins
• Low Current Drain (typically <4 µA)
• Two Power Saving Modes: HALT and IDLE
• -40℃ to +85℃, -40℃ to +125℃ Temperature Range
• Windowed Packages for PDIP and PLCC
• Real Time Emulation and Debug Tools Available