Infineon/CYPRESS CY8C4247AZI-L485

PSoC™ 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm® Cortex®-M0 CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. The PSoC™4200L product family, based on this platform, is a combination of a microcontroller with digital programmable logic, programmable analog, programmable interconnect, secure expansion of memory off-chip, high-performance analog-to-digital conversion, opamps with Comparator mode, and standard communication and timing peripherals. The PSoC™ 4200L products will be fully compatible with members of the PSoC™ 4 platform for new applications and design needs. The programmable analog and digital subsystems allow flexibility and in-field tuning of the design.

• 32-bit MCU subsystem - 48 MHz Arm® Cortex®-M0 CPU with single-cycle multiply - Up to 256 kB of flash with Read Accelerator - Up to 32 kB of SRAM - DMA engine with 32 channels
• Programmable Analog
  • Four opamps that operate in Deep Sleep mode at very low current levels
  • All opamps have reconfigurable high current pin-drive, high-bandwidth internal drive, ADC input buffering, and Comparator modes with flexible connectivity allowing input connections to any pin
  • Four current DACs (IDACs) for general-purpose or capacitive sensing applications on any pin
  • Two low-power comparators that operate in Deep Sleep mode
• Programmable Digital
  • Eight programmable logic blocks, each with 8 Macrocells and an 8-bit data path (called universal digital blocks or UDBs)
  • Infineon-provided peripheral component library, user-defined state machines, and Verilog input
• Low Power 1.71 V to 5.5 V operation - 20-nA Stop Mode with GPIO pin wakeup - Hibernate and Deep Sleep modes allow wakeup-time versus power trade-offs
• Capacitive Sensing
  • Two Infineon Capacitive Sigma-Delta (CSD) blocks provide best-in-class SNR (>5;1) and water tolerance
  • Infineon-supplied software component makes capacitive sensing design easy
  • Automatic hardware tuning (SmartSense™)
• Segment LCD Drive
  • LCD drive supported on any pin with up to a maximum of 64 outputs (common or segment)
  • Operates in Deep Sleep mode with 4 bits per pin memory
• Serial Communication
  • Four independent run-time reconfigurable serial communication blocks (SCBs) with reconfigurable I2C, SPI, or UART functionality
  • USB Full-Speed device interface 12 Mbits/second with Battery Charger Detect capability
  • Two independent CAN blocks for industrial and automotive networking
• Timing and Pulse-Width Modulation
  • Eight 16-bit timer/counter pulse-width modulator (TCPWM) blocks
  • Center-aligned, Edge, and Pseudo-random modes
  • Comparator-based triggering of Kill signals for motor drive and other high-reliability digital logic applications
• Up to 98 Programmable GPIOs
  • 124-ball VFBGA, 64-pin TQFP, 48-pin TQFP, and 68-pin QFN packages
  • Any of up to 94 GPIO pins can be CAPSENSE™, analog, or digital
  • Drive modes, strengths, and slew rates are programmable
• PSoC™ Creator Design Environment
  • Integrated Development Environment (IDE) provides schematic design entry and build (with analog and digital automatic routing)
  • Applications Programming Interface (API component) for all fixed-function and programmable peripherals
• Industry-Standard Tool compatibility
  • After schematic entry, development can be done with Arm®-based industry-standard development tools