MXIC MX25U25643GBJI00
| Produttore | |
| Cod. Prod. | MX25U25643GBJI00 |
| Cod. LCSC | C2913637 |
| Imballo | BGA |
| Numero Cliente | |
| Attr. chiave | 256Mbit 1.65V~2V 133MHz SPI BGA Memory |
| Scheda Tecnica | MXIC MX25U25643GBJI00 |
| Parti alternative | 1 |
Specifiche del Prodotto
Tutto
| Tipo | Descrizione | |
|---|---|---|
| Categoria | Integrated Circuits (ICs)/Memory/Memory | |
| Produttore | MXIC | |
| Imballo | BGA | |
| Operating Temperature | -40℃~+85℃ | |
| Features | Write enable latch;Hardware write protection;Software write protection;Absolute write protection | |
| Memory Size | 256Mbit | |
| Voltage - Supply | 1.65V~2V | |
| Program / Erase Cycles | 100,000 cycles | |
| Clock Frequency | 133MHz | |
| Data Retention - TDR (Year) | 20 Years | |
| Block Erase Time(tBE) | - | |
| Write Cycle Time(tWC) | - | |
| Page Programming Time (Tpp) | - | |
| Standby Supply Current | - | |
| Interface | SPI |
| Tipo | Descrizione | |
|---|---|---|
| Categoria | Integrated Circuits (ICs)/Memory/Memory | |
| Produttore | MXIC | |
| Imballo | BGA | |
| Operating Temperature | -40℃~+85℃ | |
| Features | Write enable latch;Hardware write protection;Software write protection;Absolute write protection | |
| Memory Size | 256Mbit | |
| Voltage - Supply | 1.65V~2V | |
| Program / Erase Cycles | 100,000 cycles |
| Tipo | Descrizione | |
|---|---|---|
| Clock Frequency | 133MHz | |
| Data Retention - TDR (Year) | 20 Years | |
| Block Erase Time(tBE) | - | |
| Write Cycle Time(tWC) | - | |
| Page Programming Time (Tpp) | - | |
| Standby Supply Current | - | |
| Interface | SPI |
Aiuto & FeedbackMostra prodotti simili (0) >
Caratteristiche
Traduzione AI
- Protocol Support - Single I/O, Dual I/O and Quad I/O
- Support DTR (Double Transfer Rate) Mode
- Support clock frequency up to 133MHz
- Quad Peripheral Interface (QPI) Read / Program Mode
- Supports Serial Peripheral Interface -- Mode 0 and Mode 3
- Single Power Supply Operation - 1.65 to 2.0 volt for read, erase, and program operations
- 268,435,456 x 1 bit structure or 134,217,728 x 2 bits (two I/O mode) structure or 67,108,864 x 4 bits (four I/O mode) structure
- Latch-up protected to 100mA from -1V to Vcc +1V
- Low Vcc write inhibit is from 1.0V to 1.4V
- Fast read for SPI mode - Support clock frequency up to 133MHz
- Support Fast Read, 2READ, DREAD, 4READ, QREAD instructions
- Support DTR (Double Transfer Rate) Mode
- Configurable dummy cycle number for fast read operation
- Support Performance Enhance Mode - XIP (execute-in-place)
- Quad Peripheral Interface (QPI) available
- Equal Sectors with 4K byte each, or Equal Blocks with 32K byte each or Equal Blocks with 64K byte each - Any Block can be erased individually
- Programming: - 256byte page buffer - Quad Input/Output page program(4PP) to enhance program performance
- Typical 100,000 erase/program cycles
- 20 years data retention
- Input Data Format - 1-byte Command code
- Advanced Security Features - Block lock protection. The BP0 - BP3 and T/B status bits define the size of the area to be protected against program and erase instructions
Esaurito
Avvisami
Minimo: 1Multiplo: 1Unità di vendita: Piece
Aggiungi alla Lista BOM
| Qtà | Pr. unit.(Solo per riferimento) | Importo totale |
|---|---|---|
| 1+ | $ 3.7032 | $ 3.70 |
| 200+ | $ 1.4335 | $ 286.70 |
| 500+ | $ 1.3841 | $ 692.05 |
| 1,000+ | $ 1.3579 | $ 1357.90 |
Package Standard3000/Full Reel | ||
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Specifiche del Prodotto
Tutto
| Tipo | Descrizione | |
|---|---|---|
| Categoria | Integrated Circuits (ICs)/Memory/Memory | |
| Produttore | MXIC | |
| Imballo | BGA | |
| Operating Temperature | -40℃~+85℃ | |
| Features | Write enable latch;Hardware write protection;Software write protection;Absolute write protection | |
| Memory Size | 256Mbit | |
| Voltage - Supply | 1.65V~2V | |
| Program / Erase Cycles | 100,000 cycles | |
| Clock Frequency | 133MHz | |
| Data Retention - TDR (Year) | 20 Years | |
| Block Erase Time(tBE) | - | |
| Write Cycle Time(tWC) | - | |
| Page Programming Time (Tpp) | - | |
| Standby Supply Current | - | |
| Interface | SPI |
| Tipo | Descrizione | |
|---|---|---|
| Categoria | Integrated Circuits (ICs)/Memory/Memory | |
| Produttore | MXIC | |
| Imballo | BGA | |
| Operating Temperature | -40℃~+85℃ | |
| Features | Write enable latch;Hardware write protection;Software write protection;Absolute write protection | |
| Memory Size | 256Mbit | |
| Voltage - Supply | 1.65V~2V | |
| Program / Erase Cycles | 100,000 cycles |
| Tipo | Descrizione | |
|---|---|---|
| Clock Frequency | 133MHz | |
| Data Retention - TDR (Year) | 20 Years | |
| Block Erase Time(tBE) | - | |
| Write Cycle Time(tWC) | - | |
| Page Programming Time (Tpp) | - | |
| Standby Supply Current | - | |
| Interface | SPI |
Aiuto & FeedbackMostra prodotti simili (0) >
Caratteristiche
Traduzione AI
- Protocol Support - Single I/O, Dual I/O and Quad I/O
- Support DTR (Double Transfer Rate) Mode
- Support clock frequency up to 133MHz
- Quad Peripheral Interface (QPI) Read / Program Mode
- Supports Serial Peripheral Interface -- Mode 0 and Mode 3
- Single Power Supply Operation - 1.65 to 2.0 volt for read, erase, and program operations
- 268,435,456 x 1 bit structure or 134,217,728 x 2 bits (two I/O mode) structure or 67,108,864 x 4 bits (four I/O mode) structure
- Latch-up protected to 100mA from -1V to Vcc +1V
- Low Vcc write inhibit is from 1.0V to 1.4V
- Fast read for SPI mode - Support clock frequency up to 133MHz
- Support Fast Read, 2READ, DREAD, 4READ, QREAD instructions
- Support DTR (Double Transfer Rate) Mode
- Configurable dummy cycle number for fast read operation
- Support Performance Enhance Mode - XIP (execute-in-place)
- Quad Peripheral Interface (QPI) available
- Equal Sectors with 4K byte each, or Equal Blocks with 32K byte each or Equal Blocks with 64K byte each - Any Block can be erased individually
- Programming: - 256byte page buffer - Quad Input/Output page program(4PP) to enhance program performance
- Typical 100,000 erase/program cycles
- 20 years data retention
- Input Data Format - 1-byte Command code
- Advanced Security Features - Block lock protection. The BP0 - BP3 and T/B status bits define the size of the area to be protected against program and erase instructions
Conformità & Codici di Esportazione
| Tipo | Dettagli |
|---|---|
| ECCN | - |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Tipo | Dettagli |
|---|---|
| ECCN | - |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Tipo | Dettagli |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
Parti alternative
| MPN | Produttore | Imballaggio | Disponibilità | Prezzo unitario | ||
|---|---|---|---|---|---|---|
| MX25U25643GZNI00 | MXIC | BGA | 0 | $ 4.14 |

