TI TMS320F2812GBBS
| Hersteller | |
| Herst.-Teilenr. | TMS320F2812GBBS |
| LCSC-Nr. | C2864568 |
| Verp. | NFBGA-179 |
| Kundennummer | |
| Hauptmerkm. | TMS320F281× Digital Signal Processor |
| Datenblatt | TI TMS320F2812GBBS |
| RoHS-Konformität | 2 Dokumente verfügbar |
Produktspezifikationen
Alle
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Hersteller | TI | |
| Verp. | NFBGA-179 | |
| Operating Temperature | -40℃~+125℃ | |
| Clock Rate | 150MHz |
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Hersteller | TI | |
| Verp. | NFBGA-179 |
| Typ | Beschreibung | |
|---|---|---|
| Operating Temperature | -40℃~+125℃ | |
| Clock Rate | 150MHz |
Hilfe & FeedbackÄhnliche Produkte anzeigen (0) >
Beschreibung
KI-Übersetzung
TMS320F2810, TMS320F2811, and TMS320F2812 devices are all part of the TMS320C28x DSP family of devices and are highly integrated and high-performance solutions for demanding control applications.
Merkmale
KI-Übersetzung
- High-performance static CMOS technology – 150MHz (6.67ns cycle time) – Low-power design (1.8V core voltage at 135MHz, 1.9V core voltage at 150MHz, 3.3V I/O)
- JTAG boundary scan support – IEEE Std 1149.1-1990 IEEE Standard Test Access Port and Boundary-Scan Architecture
- High-performance 32-bit CPU (TMS320C28x)
- 16x16 and 32x32 MAC operations
- 16x16 dual MAC
- Harvard bus architecture
- Atomic operations
- Fast interrupt response and processing
- Unified memory programming model
- 4M linear program/data address range
- Efficient code (using C/C++ and assembly language)
- TMS320F24x/LF240x processor source code compatible
- On-chip memory
- Up to 128Kx16 Flash (four 8Kx16 and six 16Kx16 sectors)
- 1Kx16 OTP ROM
- L0 and L1: two 4Kx16 single-cycle access RAM (SARAM) blocks
- H0: one 8Kx16 SARAM block
- M0 and M1: two 1Kx16 SARAM blocks
- Boot ROM (4Kx16)
- Software boot modes
- Standard math tables
- External interface (F2812)
- Total memory greater than 1Mx16
- Programmable wait states
- Programmable read/write strobe timing
- Three independent chip selects
- Endianness: little-endian
- Clock and system control
- On-chip oscillator
- Watchdog timer module
- Three external interrupts
- Peripheral Interrupt Expansion (PIE) block supporting 45 peripheral interrupts
- Three 32-bit CPU timers
- 128-bit security key/lock
- Flash/OTP and L0/L1 SARAM protection
- Firmware reverse-engineering prevention
- Motor control peripherals
- Two event managers (EVA, EVB)
- Compatible with 240xA devices
- Serial port peripherals
- Serial Peripheral Interface (SPI)
- Two Serial Communication Interfaces (SCI), standard UART
- Enhanced Controller Area Network (eCAN)
- Multi-channel Buffered Serial Port (McBSP)
- 12-bit ADC, 16 channels
- 2x8-channel input multiplexer
- Two sample-and-hold
- Single/simultaneous conversion
- Fast conversion rate: 80ns/12.5MSPS
- Up to 56 GPIO pins
- Advanced emulation features
- Analysis and breakpoint functions
- Real-time hardware debugging
- Development tools include
- ANSI C/C++ compiler/assembler/linker
- Code Composer Studio IDE
- DSP/BIOS
- JTAG scan controller
- IEEE Std 1149.1-1990 IEEE Standard Test Access Port and Boundary-Scan Architecture
- Low-power modes for power saving
- IDLE, STANDBY, and HALT mode support
- Individual peripheral clock disable
Anwendungen
KI-Übersetzung
- Advanced Driver Assistance Systems (ADAS)
- Building Automation
- Electronic Point of Sale
- EV/HEV Powertrain
- Factory Automation
- Grid Infrastructure
- Industrial Transportation
- Medical, Healthcare & Fitness
- Motor Drivers
- Power Delivery
- Telecom Infrastructure
- Test and Measurement
Vorrätig: 3
3 Ab Lager, sofort versandfertig
Minimum: 1Vielfaches: 1Verkaufseinheit: Piece
Zur BOM-Liste hinzufügen
| Stk. | E-Preis | Gesamtbetrag |
|---|---|---|
| 1+ | $ 56.2553 | $ 56.26 |
| 30+ | $ 53.2698 | $ 1598.09 |
Standardgehäuse160/Full Tray | ||
Besserer Preis bei größerer Menge?
$
Produktspezifikationen
Alle
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Hersteller | TI | |
| Verp. | NFBGA-179 | |
| Operating Temperature | -40℃~+125℃ | |
| Clock Rate | 150MHz |
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Hersteller | TI | |
| Verp. | NFBGA-179 |
| Typ | Beschreibung | |
|---|---|---|
| Operating Temperature | -40℃~+125℃ | |
| Clock Rate | 150MHz |
Hilfe & FeedbackÄhnliche Produkte anzeigen (0) >
Beschreibung
KI-Übersetzung
TMS320F2810, TMS320F2811, and TMS320F2812 devices are all part of the TMS320C28x DSP family of devices and are highly integrated and high-performance solutions for demanding control applications.
Merkmale
KI-Übersetzung
- High-performance static CMOS technology – 150MHz (6.67ns cycle time) – Low-power design (1.8V core voltage at 135MHz, 1.9V core voltage at 150MHz, 3.3V I/O)
- JTAG boundary scan support – IEEE Std 1149.1-1990 IEEE Standard Test Access Port and Boundary-Scan Architecture
- High-performance 32-bit CPU (TMS320C28x)
- 16x16 and 32x32 MAC operations
- 16x16 dual MAC
- Harvard bus architecture
- Atomic operations
- Fast interrupt response and processing
- Unified memory programming model
- 4M linear program/data address range
- Efficient code (using C/C++ and assembly language)
- TMS320F24x/LF240x processor source code compatible
- On-chip memory
- Up to 128Kx16 Flash (four 8Kx16 and six 16Kx16 sectors)
- 1Kx16 OTP ROM
- L0 and L1: two 4Kx16 single-cycle access RAM (SARAM) blocks
- H0: one 8Kx16 SARAM block
- M0 and M1: two 1Kx16 SARAM blocks
- Boot ROM (4Kx16)
- Software boot modes
- Standard math tables
- External interface (F2812)
- Total memory greater than 1Mx16
- Programmable wait states
- Programmable read/write strobe timing
- Three independent chip selects
- Endianness: little-endian
- Clock and system control
- On-chip oscillator
- Watchdog timer module
- Three external interrupts
- Peripheral Interrupt Expansion (PIE) block supporting 45 peripheral interrupts
- Three 32-bit CPU timers
- 128-bit security key/lock
- Flash/OTP and L0/L1 SARAM protection
- Firmware reverse-engineering prevention
- Motor control peripherals
- Two event managers (EVA, EVB)
- Compatible with 240xA devices
- Serial port peripherals
- Serial Peripheral Interface (SPI)
- Two Serial Communication Interfaces (SCI), standard UART
- Enhanced Controller Area Network (eCAN)
- Multi-channel Buffered Serial Port (McBSP)
- 12-bit ADC, 16 channels
- 2x8-channel input multiplexer
- Two sample-and-hold
- Single/simultaneous conversion
- Fast conversion rate: 80ns/12.5MSPS
- Up to 56 GPIO pins
- Advanced emulation features
- Analysis and breakpoint functions
- Real-time hardware debugging
- Development tools include
- ANSI C/C++ compiler/assembler/linker
- Code Composer Studio IDE
- DSP/BIOS
- JTAG scan controller
- IEEE Std 1149.1-1990 IEEE Standard Test Access Port and Boundary-Scan Architecture
- Low-power modes for power saving
- IDLE, STANDBY, and HALT mode support
- Individual peripheral clock disable
Anwendungen
KI-Übersetzung
- Advanced Driver Assistance Systems (ADAS)
- Building Automation
- Electronic Point of Sale
- EV/HEV Powertrain
- Factory Automation
- Grid Infrastructure
- Industrial Transportation
- Medical, Healthcare & Fitness
- Motor Drivers
- Power Delivery
- Telecom Infrastructure
- Test and Measurement
C2864568 EasyEDA-Bibliothek
Compliance & Exportcodes
| Typ | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Typ | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Typ | Details |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS | |

