The Definitive Guide to Select MOSFET for Motor Contro

TL;DR: MOSFET Selection for Motor Control

MOSFET selection for motor control is a four-parameter optimisation: (1) VDS must exceed bus voltage by 20–30% to survive inductive back-EMF spikes; (2) RDS(on) must be minimised to reduce conduction losses — target below 10 mΩ for high-power designs; (3) gate charge Qg determines switching speed and gate driver current demand — lower Qg means faster switching and lower gate driver dissipation; (4) the thermal package must dissipate the combined conduction and switching losses without exceeding Tj = 125°C.

Key Takeaways

VDS safety margin: Specify VDS at least 20–30% above maximum bus voltage to absorb inductive voltage spikes (back-EMF) from motor windings.
RDS(on) drives thermal efficiency: Conduction loss = I² × RDS(on). For high-current designs, target RDS(on) below 10 mΩ to achieve 95–98% efficiency.
Logic-level MOSFETs for 3.3V/5V gate drives: Standard MOSFETs require 10–15 V at the gate to reach minimum RDS(on). Logic-level variants with VGS(th) of 1.0–2.5 V are required for direct MCU drive.
Qg determines switching loss and gate driver requirements: Lower Qg enables faster switching and reduces gate driver IC current demand. High Qg increases time in the linear region, generating heat.
Body diode recovery time trr affects freewheeling performance: Slow trr increases power loss and EMI during motor freewheeling. SiC MOSFETs offer ultra-fast recovery; external Schottky diodes are an alternative for low-voltage designs.

Introduction: The Critical Role of MOSFET in Motor Control

In H-bridge and 3-phase inverter circuits, MOSFETs act as high-speed switches, steering current through motor windings at frequencies typically ranging from 10 kHz to 100 kHz. If a MOSFET is underspecified, conduction and switching losses will exceed the package’s thermal limits. Overspecifying a MOSFET leads to unnecessary costs and increased gate drive complexity due to higher parasitic capacitances.

LCSC’s inventory includes MOSFETs from global manufacturers and high-performance domestic brands including UMW, WINSOK, and Slkor, which offer competitive price-to-performance ratios as alternatives to traditional tier-1 components.

Primary Electrical Parameters and Safety Margins

Drain-Source Voltage (VDS)

VDS is the maximum voltage the MOSFET can withstand between drain and source in the OFF state. For motor control, specify VDS at least 20–30% above the maximum bus voltage. For a 24 V motor system, a 40 V or 60 V rated MOSFET is standard. This margin absorbs inductive voltage spikes (back-EMF) generated when motor windings are switched off. In high-power BLDC applications, these spikes can easily exceed nominal battery voltage by several volts.

Continuous Drain Current (ID)

The ID rating must handle the motor’s continuous operating current plus a buffer for startup and stall conditions. Motors can draw 5 to 10 times their rated current during initial startup. For a motor with a 5 A rated current, an ID of at least 30–50 A ensures the device stays within its Safe Operating Area (SOA). Note that ID ratings in datasheets are typically specified at a case temperature (TC) of 25°C; in real-world conditions, usable current is significantly lower.

On-Resistance (RDS(on))

Conduction loss is calculated as Pcond = I² × RDS(on). In high-current applications, even a few milliohms difference results in several watts of wasted heat. Modern N-channel MOSFETs available at LCSC offer ultra-low RDS(on) values below 10 mΩ, improving system efficiency to 95–98%. Reducing conduction losses is the most direct way to minimise the size and cost of the thermal management system.

Gate Threshold Voltage (VGS(th))

Confirm that the gate driver or microcontroller can fully enhance the MOSFET. For 3.3 V logic, logic-level MOSFETs with VGS(th) of 1.0–2.5 V are required. Standard MOSFETs may require 10–15 V at the gate to reach minimum RDS(on). If gate voltage is too low, the MOSFET operates in its linear region, leading to rapid overheating and failure.

Parameter Summary Table

Parameter	Recommended Range / Safety Margin	Impact on Design
VDS	Bus Voltage + 20–30%	Prevents breakdown from inductive spikes
ID	Peak Motor Current + 20%	Prevents thermal runaway during stall
RDS(on)	< 10 mΩ (High Power)	Reduces heat dissipation requirements
VGS(th)	1.5 V – 4 V (Logic Level)	Dictates gate driver voltage requirements

Dynamic Performance and Switching Losses

Gate Charge (Qg)

Qg is the total charge required to turn the MOSFET fully ON. Lower Qg allows faster switching and reduces gate driver current requirements. If Qg is too high, the MOSFET spends more time in the linear region during transitions, generating significant heat. High Qg also increases stress on the gate driver IC, which must source and sink significant current to maintain fast switching edges.

Parasitic Capacitances (Ciss, Coss, Crss)

Input capacitance Ciss affects the initial turn-on delay; reverse transfer capacitance Crss influences switching speed and susceptibility to ‘Miller effect’ turn-on. In 3-phase BLDC drives, high Crss can cause the low-side MOSFET to momentarily turn on when the high-side MOSFET switches, leading to a destructive shoot-through condition. MOSFETs with a low Crss/Ciss ratio and high-performance gate drivers with strong pull-down capabilities mitigate this risk.

Body Diode Recovery Time (trr)

A slow reverse recovery time trr causes significant power loss and EMI noise during motor freewheeling. SiC MOSFET lines offer ultra-fast recovery times, making them ideal for high-voltage, high-efficiency motor drives. For low-voltage applications, an external Schottky diode in parallel with the MOSFET can be more efficient than relying on the internal body diode.

Thermal Management and Package Selection

TO-220: The standard for through-hole designs. Excellent thermal performance when attached to a heatsink. Thermal resistance junction-to-case (RθJC) typically below 1°C/W.
DPAK (TO-252): Popular surface-mount package for medium-power applications (up to 50 A). Relies on PCB copper planes for cooling. Use multiple thermal vias and large copper pours on both sides.
PowerSO-8 / DFN5×6: Compact surface-mount packages with an exposed thermal pad on the bottom. Ideal for space-constrained BLDC controllers where multiple MOSFETs must be placed in a small area. Low parasitic inductance helps reduce EMI in high-frequency designs.

The required thermal resistance RθJA must keep junction temperature Tj below 125°C. In many high-current designs, aim for a temperature rise of less than 40°C above ambient.

Practical Selection Workflow

Define system voltage: Multiply maximum battery/supply voltage by 1.25 to find minimum VDS.
Determine peak current: Identify the motor’s stall current. Select ID that handles this with a 20% buffer.
Select target RDS(on): Based on your thermal budget (e.g., max 2 W loss per FET), determine the maximum allowable RDS(on).
Check gate compatibility: Confirm MCU or driver can provide sufficient voltage and current for the chosen Qg.
Verify thermal package: Select a package that fits PCB constraints and cooling method. Confirm RθJC and RθJA values.
Cross-reference for cost: Use LCSC to compare tier-1 models with alternatives.

Application Type Reference

Application Type	Recommended Brand	Key Specs	Typical Package
Low Power (< 5 A)	Slkor, UMW	Logic-level VGS(th), VDS 30–60 V	SOT-23, SOP-8
Medium Power (5–30 A)	WINSOK, UMW	RDS(on) < 20 mΩ, ID > 50 A	DPAK, TO-220
High Power (> 30 A)	WINSOK, Slkor	RDS(on) < 5 mΩ, Qg < 100 nC	TO-220, DFN5×6

EMI and Parasitic Oscillation Mitigation

Gate Resistors: An appropriate gate resistor slows switching edges slightly, then reducing oscillations without excessively increasing switching losses.
Snubber Circuits: RC snubber circuits across drain and source dampen high-frequency ringing caused by parasitic inductance.
PCB Layout: Keep power loops as small as possible and use dedicated ground planes to provide a low-impedance return path for switching currents.

Quick Selection Guide: MOSFET for Motor Control in 60 Seconds

If motor bus voltage is 24 V → Specify VDS ≥ 40 V preferably(preferably 60 V for margin against inductive spikes)
If motor rated current is 5 A → Select ID ≥ 30 A (stall current can be 5–10× rated; stall current + 20% buffer)
3.3 V MCU direct gate drive? → Logic-level MOSFET mandatory; VGS(th) < 2.5 V
High-frequency PWM (> 50 kHz)? → Minimise Qg for fast switching; review Crss/Ciss ratio to prevent shoot-through
Shoot-through risk in H-bridge? → Specify low Crss/Ciss ratio; use gate driver with strong pull-down; add dead-time in PWM
Freewheeling efficiency concern? → SiC MOSFET for ultra-fast trr; or parallel external Schottky diode for low-voltage designs
Thermal budget limited? → Use exposed-pad package (PowerSO-8 / DFN5×6) with thermal vias; confirm RθJA keeps Tj < 125°C

Conclusion

Selecting the right MOSFET is a multi-dimensional optimisation: VDS safety margins, low RDS(on), manageable Qg, and appropriate thermal packaging. By following the structured selection workflow — define voltage, determine peak current, select target RDS(on), check gate compatibility, verify thermal package, and cross-reference for cost — engineers can design motor controllers that are both efficient and robust. Always verify the final selection against the official manufacturer datasheet and validate thermally under worst-case stall conditions before committing to production.

Browse MOSFETs on LCSC — filter by VDS, ID, RDS(on), VGS(th), Qg, package type, and AEC-Q100 automotive qualification.