OR and XOR gates look nearly identical on a schematic and share similar-sounding names, which is exactly why they get confused — but they disagree on one critical input combination, and that disagreement is the difference between building an alarm circuit and building an adder.
Key Takeaways:
An OR gate outputs HIGH if any input is HIGH, including when all inputs are HIGH. An XOR (Exclusive OR) gate outputs HIGH only when an odd number of inputs are HIGH — it outputs LOW if all inputs match. This single difference makes XOR essential for adders, comparators, and parity checking, while OR gates handle general logical combination tasks.
What Is an OR Gate?
An OR gate is one of the three fundamental logic gates (alongside AND and NOT) used to build every digital circuit, from simple alarm systems to microprocessors. It implements the Boolean addition function: the output Y is HIGH (logic 1) whenever at least one input is HIGH.
For a standard 2-input OR gate, the Boolean expression is:
Y = A + B
OR Gate Truth Table
| A | B | Y (A OR B) |
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
Notice the gate only outputs LOW in the single case where every input is LOW. This behavior scales to gates with more inputs (3-input, 4-input, and so on) — the output stays HIGH as long as one or more inputs are HIGH.
Common off-the-shelf OR gate ICs include the 74HC32 and 74LS32 (quad 2-input OR gate, DIP-14/SOIC-14 package), and the CMOS CD4071 quad 2-input OR gate for low-power designs. The 74HC32 operates from 2V to 6V and is pin-compatible with the older 74LS32, making it a common drop-in replacement in refurbished designs.
What Is an XOR Gate?
An XOR (Exclusive OR) gate is a derived logic gate built from AND, OR, and NOT gates internally, but it behaves as its own fundamental building block in digital design. Its defining rule: the output is HIGH only when the inputs are different from each other.
For a 2-input XOR gate:
Y = A ⊕ B = A′B + AB′
XOR Gate Truth Table
| A | B | Y (A XOR B) |
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
The key distinction from OR shows up in the last row: when both inputs are HIGH, an OR gate outputs 1, but an XOR gate outputs 0. For gates with more than two inputs, XOR generalizes to an “odd parity” function — the output is HIGH only when an odd number of inputs are HIGH.
A widely used XOR IC is the 74LS86 (also sold as the 7486), a quad 2-input TTL XOR gate with a typical propagation delay around 13 ns. Its CMOS counterpart, the 74HC86, runs from 2V to 6V, and the 74HCT86 variant offers TTL-compatible input thresholds for mixed 3.3V/5V systems. The CMOS CD4070 is another common quad XOR option for low-power, battery-driven circuits.
XOR vs. OR Gate: Side-by-Side Comparison
| Feature | OR Gate | XOR Gate |
| Boolean expression | Y = A + B | Y = A ⊕ B |
| Output when both inputs are HIGH | HIGH (1) | LOW (0) |
| Output when both inputs are LOW | LOW (0) | LOW (0) |
| Core function | “At least one” input is true | “Exactly one” (odd count) of inputs is true |
| Gate type | Fundamental (AND, OR, NOT primitives) | Derived (built from AND/OR/NOT internally) |
| IEC/ANSI symbol | Curved-back shape, single input curve | Curved-back shape, double input curve |
| Common TTL part | 74LS32 | 74LS86 |
| Common CMOS part | 74HC32 / CD4071 | 74HC86 / CD4070 |
| Typical uses | Alarm/event OR-ing, control logic, address decoding | Binary addition, comparators, parity checking, and data encryption |
When to Use an OR Gate
Reach for an OR gate whenever a circuit needs to trigger an action if any one of several conditions is met. Typical applications include:
- Alarm and interlock systems — trigger an alert if a door sensor, motion sensor, or smoke sensor activates.
- Control logic combination — merge multiple enable or trigger signals from different subsystems into a single control line.
- Address decoding — combine partial address matches in memory-mapped I/O designs.
- Redundant signal paths — accept a valid signal from any of several backup sources.
OR gates are also the natural choice whenever a design calls for simple Boolean “at least one condition” logic without needing to distinguish how many inputs are actually active.
When to Use an XOR Gate
XOR gates are the workhorse of arithmetic and comparison logic. Reach for XOR when a circuit needs to detect a difference between signals rather than simply whether any signal is present:
- Binary addition — a half-adder uses one XOR gate (for the sum bit) and one AND gate (for the carry bit); full adders chain two XOR gates together.
- Digital comparators — a 1-bit comparator can be built from a single XOR gate: the output is 0 only when the two bits match, making it ideal for equality checks.
- Parity generation and checking — chains of XOR gates count the number of 1s in a data word, a standard technique for detecting single-bit transmission errors in memory and communication systems.
- Controlled inverters — holding one XOR input HIGH turns the gate into an inverter for the other input, useful for programmable sign-flip or 2’s complement circuits.
- Simple stream ciphers — XOR is the basis of the one-time pad and many lightweight encryption schemes, since XOR-ing data with a key and then XOR-ing again with the same key recovers the original data.
If you’re chaining XOR gates into an adder, it’s worth reading our related guide to half-adders and full-adders for the complete carry-and-sum logic, and our comparison of TTL vs. CMOS logic families if you’re still deciding which voltage class fits your board.
Building an XOR Function From Basic Gates
Because XOR is a derived function, it’s worth understanding how it’s constructed internally — useful when a dedicated XOR IC isn’t on hand. The standard implementation uses two NOT gates, two AND gates, and one OR gate:
- Invert A and invert B using two NOT gates.
- Feed (NOT A) AND B into one AND gate, and A AND (NOT B) into a second AND gate.
- Combine both AND gate outputs with an OR gate to produce the final XOR output.
This is precisely how internal logic inside parts like the 74LS86 is structured, and it’s a handy fallback when only AND, OR, and NOT gates (e.g., from a 74HC00 NAND-based logic family) are available on a board — the same principle extends to NAND and NOR gates as universal building blocks if you need to derive XOR from an even smaller parts set.
Selecting the Right Gate IC for Your Design
When specifying components, consider:
- Logic family and voltage — TTL parts like the 74LS32/74LS86 need a steady 5V (4.75–5.25V) rail, while CMOS parts like the 74HC32/74HC86 tolerate a wider 2V–6V range, and 74HCT-series parts bridge 3.3V logic to 5V TTL thresholds.
- Package size — DIP-14 is common for prototyping, while SOIC-14, TSSOP-14, and compact QFN packages suit space-constrained production boards.
- Number of gates per package — most quad 2-input gate ICs (74HC32, 74LS86, CD4071, CD4070) pack four independent gates into one chip, reducing board footprint compared to discrete gates.
- Propagation delay — LS-TTL parts typically switch in the 10–50 ns range, while HC-CMOS parts vary with supply voltage; check the datasheet if timing margins are tight in a high-speed design.
For a broader rundown of which logic functions are available in the same package family, see our 7400 series logic ICs buyer’s guide.
LCSC stocks a wide range of quad OR and XOR gate ICs across TTL, HC-CMOS, and HCT-CMOS families from major manufacturers, along with matching NAND, NOR, and AND gate parts for building custom combinational logic — all with competitive pricing and fast global shipping, plus seamless integration with JLCPCB for board assembly.
Frequently Asked Questions
Q: Is XOR the same as OR?
No, though they agree on three of four input combinations. Both an OR gate and an XOR gate output LOW when all inputs are LOW, and both output HIGH when exactly one input is HIGH. They diverge on the remaining case: when both inputs are HIGH, an OR gate still outputs HIGH (its rule is “at least one input is true”), while an XOR gate outputs LOW (its rule is “exactly one input is true,” or more generally, an odd number of inputs are true). That single-row difference is what makes XOR useful for detecting whether two signals match or differ, while OR is used for general “any condition is true” logic, like alarms or enable lines.
Q: Can an XOR gate be made from OR, AND, and NOT gates?
Yes. Since XOR is a derived logic function rather than a p/rimitive one, a 2-input XOR gate can be built entirely from two NOT gates, two AND gates, and one OR gate. Each input is inverted by its own NOT gate; one AND gate combines the inverted A with the original B, and a second AND gate combines the original A with inverted B. The two AND gate outputs are then fed into a single OR gate to produce the final XOR result. This is exactly how the internal logic of dedicated XOR ICs like the 74LS86 is structured, and it’s a practical fallback when only basic AND, OR, and NOT gates are available on a board.
Q: Why is XOR used in binary addition instead of OR?
Binary addition needs the sum bit to reflect an odd/even relationship between input bits, not simply whether any bit is set, which is exactly the parity behavior XOR provides and OR cannot. In a half-adder, adding two 1-bit inputs (1 + 1) must produce a sum bit of 0 with a carry bit of 1. An OR gate would incorrectly output 1 for that case, since both inputs are HIGH. XOR correctly outputs 0 for the sum bit, while a separate AND gate generates the carry bit. This is why every adder circuit, from simple half-adders to full ALU adder chains, relies on XOR gates for the sum logic rather than OR gates.
Q: What’s a common XOR gate IC, and what’s its OR gate counterpart?
The 74LS86 is a widely used quad 2-input TTL XOR gate IC, with the 74HC86 and 74HCT86 serving as its CMOS equivalents for lower-power or mixed-voltage designs. Its direct OR gate counterpart is the 74LS32 (TTL) or 74HC32 (CMOS), which shares the same DIP-14 pinout convention and package options (DIP, SOIC, TSSOP), making it easy to swap logic functions on a board without re-laying out the footprint. Low-power CMOS alternatives include the CD4070 (quad XOR) and CD4071 (quad OR), both common in battery-powered designs where quiescent current matters more than switching speed.
Q: Does XOR have more than two inputs?
Yes. Multi-input XOR gates exist and generalize the same odd-parity rule that governs the 2-input case: the output is HIGH only when an odd number of the inputs are HIGH, and LOW whenever an even number (including zero) is HIGH. This property is the basis for parity generator and parity checker circuits, which chain multiple XOR gates together to count the number of 1-bits in a data word. Parity checking is a standard technique in memory systems and serial communication protocols for catching single-bit transmission errors, since a single flipped bit changes the overall parity and causes the XOR chain’s output to flip as well.
Conclusion
The difference between an OR gate and an XOR gate comes down to a single truth-table row: when all inputs are HIGH, OR stays HIGH while XOR drops LOW. That distinction is what makes OR gates suited for general “any condition is true” logic, while XOR gates become indispensable for addition, comparison, and parity operations in digital systems. Whether you’re prototyping with a 74LS32/74LS86 pair or designing a production board around HC-CMOS logic, matching the gate function to the task saves both board space and design headaches.
Browse LCSC’s full selection of OR gate and XOR gate ICs to find the right logic family, package, and pricing for your next design.
