Key Takeaways
- Annular ring = copper pad area surrounding a drilled or laser-machined PCB hole.
- Width = (Pad Diameter – Finished Hole Diameter) / 2; ranges from 1 mil (HDI microvias) to 8+ mil (standard).
- IPC Class 3 requires ≥2 mil on external layers and ≥1 mil on internal layers; zero breakout or tangency.
- Teardrop pads are mandatory for Class 3 and recommended for traces narrower than 20 mil.
- HDI microvias (IPC-2226 Level B) allow 1 mil minimum rings thanks to laser-drill accuracy of ±0.5 mil.
Product Entity Definition
The PCB annular ring — sometimes referred to as the “ring” or “land ring” — is the copper area that remains around a drilled or laser-machined hole on each layer of a printed circuit board. More precisely, it is the copper donut-shaped region between the outer edge of the finished hole wall and the outer boundary of the copper pad. When viewed from above, plated vias display this ring pattern clearly, which is the origin of the term “annular” (from the Latin annulus, meaning ring).
Annular rings are present on both through-hole vias and component plated through-holes (PTHs), spanning all layers the hole passes through. The width of an annular ring is calculated as half the difference between the pad diameter and the finished hole diameter: Annular Ring Width = (Pad Diameter – Finished Hole Diameter) / 2. Typical widths range from 0.05 mm (2 mil) for high-density HDI boards to 0.2 mm (8 mil) or more for standard commercial designs, depending on the IPC product class and the manufacturing capability of the fabricator.
These structures are governed primarily by IPC-2221 (Generic Standard on Printed Board Design), IPC-6012 (Qualification and Performance Specification for Rigid Printed Boards), and IPC-2226 (Design Standard for High Density Interconnect), and they appear in virtually every PCB manufactured for consumer electronics, industrial automation, medical devices, aerospace systems, and telecommunications infrastructure.
Product Overview
The annular ring serves two critical functions simultaneously: it provides the electrical interface between a copper trace on a given layer and the conductive barrel of the via, and it provides the mechanical anchor that keeps the plated barrel bonded to the board substrate under thermal cycling, vibration, and assembly stresses. Without a sufficient annular ring, a drill hit that wanders even a few mils from the center of the pad can sever the trace-to-via connection entirely — a condition known as breakout — resulting in an open circuit that may not be detected until final electrical test or, worse, field failure.
Beyond simple connectivity, the annular ring width directly affects yield and cost. Tighter rings require higher precision equipment, slower throughput, and more stringent inspection — all of which translate into higher per-board cost and potentially lower first-pass yield. Conversely, excessively large pads consume routing space on dense boards, making it harder to escape BGA patterns and route tight signal layers. The designer’s task is to choose the minimum annular ring that satisfies the target IPC product class while giving the fabricator just enough process margin to achieve consistently high yield.
Compliance with IPC class requirements is not optional in regulated industries. Class 3 boards used in aerospace, military, and medical applications legally require a minimum annular ring of 2 mil on external layers and 1 mil on internal layers, with zero tolerance for breakout or tangency. Failing to meet these requirements results in board rejection, costly rework, and in some cases, full lot scrapping — making correct annular ring design one of the highest-ROI decisions in the PCB layout stage.
PCB Annular Ring Key Features and Advantages
| Feature | Description | Benefit |
| Electrical Continuity | Copper ring bridges trace and via barrel across every layer | Ensures signal and power integrity in multi-layer stackups |
| Drill Wander Compensation | Extra copper margin absorbs CNC positional tolerance of ±2–3 mil | Prevents open circuits from off-center drill hits |
| Teardrop Reinforcement | Additional copper fillet at trace-to-pad junction | Prevents trace severance under thermal cycling and mechanical stress |
| IPC Class Scalability | Ring sizing adapts to Class 1 / 2 / 3 requirements | Matches board reliability tier without over-engineering standard products |
| DFM Integration | Minimum ring rules enforced by EDA DRC checks (Altium, Cadence, KiCad) | Catches violations before Gerbers are submitted to fab |
| Layer-Specific Measurement | External rings from finished hole wall; internal rings from drilled hole wall | Accounts for copper plating thickness (0.8–1 mil) for accurate IPC compliance |
Technical Specifications
| Parameter | Value / Range |
| Annular Ring Width Formula | (Pad Diameter – Finished Hole Diameter) / 2 |
| IPC Class 1 Minimum (External) | ≈ plating thickness (~0.8 mil); breakout permitted |
| IPC Class 2 Minimum (External) | 0 mil (tangency acceptable); 90° breakout allowed |
| IPC Class 3 Minimum (External) | 2 mil (0.05 mm); zero breakout, zero tangency |
| IPC Class 3 Minimum (Internal) | 1 mil (0.025 mm); zero breakout |
| HDI Microvia (IPC-2226 Level B) | 0.025 mm (1 mil) minimum |
| Standard Mechanical Drill Min. | 4–6 mil (0.10–0.15 mm) industry typical |
| Laser Drill Microvia Minimum | 2 mil (0.05 mm) |
| Fabrication Allowance (IPC-2221C) | 8 mil maximum drill wander |
| Typical Pad Size (Class 1/2) | Via diameter + 8 mil |
| Typical Pad Size (Class 3) | Via diameter + 10 mil |
| Copper Weight Adjustment | +2 mil per additional oz/ft² above 1 oz |
| Layer Count Adjustment | +2 mil for boards with >8 layers |
| Governing Standards | IPC-2221C, IPC-6012D, IPC-2226 |
Customization & Design Options
Annular ring sizing is configurable at the design stage based on the following parameters:
- Via type: Through-hole vias require larger rings (4–8 mil) than laser-drilled microvias (2–4 mil) due to mechanical drill wander tolerances.
- IPC product class: Select Class 1 (consumer), Class 2 (general industrial), or Class 3 (high-reliability) to define the minimum acceptable ring width and breakout policy.
- Copper weight: For 2 oz/ft² copper, add 2 mil to the base ring minimum; adjust accordingly for heavier weights.
- Layer count: Boards exceeding 8 layers require an additional 2 mil allowance due to layer-to-layer registration stack-up.
- Teardrop pads: Add teardrop fillets at trace-to-pad junctions for traces narrower than 20 mil, or on all vias for Class 3 and flex PCBs.
- Via-in-pad (VIP): HDI designs using via-in-pad require copper filling and planarization; annular ring sized to IPC-2226 Level B (0.025 mm minimum).
- Anti-pad sizing: For vias passing through non-connected copper planes, the anti-pad diameter must clear the annular ring per IPC-2221C guidance.
Application Scenarios
Consumer Electronics (Class 1–2)
Smartphones, wearables, and laptop motherboards use minimum annular rings (4–5 mil) to maximize routing density on fine-pitch BGA layers. Tangency is generally acceptable; breakout is managed through high-precision automated drilling.
Industrial Automation & Control (Class 2)
PLC backplanes, motor drives, and sensor interface boards require Class 2 compliance where 90° breakout is permitted but tightly monitored. Rings of 5–6 mil support reliable operation across wide temperature ranges.
Medical Devices (Class 3 / IPC-6012 EM)
ECG monitors, surgical robotics, and implantable device PCBs mandate IPC-6012 EM Class 3 compliance. Minimum 2 mil external rings with teardrop pads are non-negotiable; failure can be life-critical.
Aerospace & Defense (Class 3 / IPC-6012 ES)
Avionics, radar systems, and satellite boards must survive extreme thermal cycling (−55°C to +125°C) and vibration. Class 3 rings of 3–5 mil with mandatory teardrops and high-Tg laminates are standard.
Automotive Electronics (Class 2–3 / IPC-6012 EA)
ADAS modules, ECUs, and battery management systems operate in high-vibration, wide-temperature environments. IPC-6012 EA specifies automotive-specific annular ring and via reliability criteria.
High-Frequency RF & Telecommunications
RF PCBs require consistent pad geometry to avoid impedance discontinuities at the via transition. Circular, uniform annular rings are preferred; irregular shapes introduce parasitic capacitance degrading signal integrity above 5 GHz.
Manufacturing Capability
Professional PCB fabricators control annular ring quality through a combination of precision equipment and process controls. Leading manufacturers use vision-registered drilling (optical fiducial alignment) to reduce drill wander to ±1–2 mil for standard mechanical drills, and laser-drilling systems achieve positional accuracy better than ±0.5 mil for microvias. Hole size tolerances for plated holes are typically controlled within ±3 mil; press-fit and non-plated holes achieve ±2 mil.
Prototype runs are typically available with a 24–72 hour turn, allowing design teams to validate annular ring adequacy before committing to production. Most fabricators offer DFM review as standard — CAM engineers analyze Gerber files for annular ring violations, drill-to-copper clearances, and pad registration before releasing to the floor. Engineering support for teardrop addition, anti-pad sizing, and IPC class documentation is widely available. Production quantities benefit from automated optical inspection (AOI) and X-ray cross-section analysis to verify ring integrity on inner layers. Lead times for production quantities range from 5 to 15 working days with global shipping support for most major markets within 3–5 days.
Comparison: IPC Class Requirements
| Attribute | Class 1 (General) | Class 2 (Dedicated Service) | Class 3 (High Reliability) |
| Typical Applications | Consumer, toys, non-critical | Telecom, industrial, computers | Medical, aerospace, military |
| External Ring Minimum | ≈ plating thickness | 0 mil (tangency ok) | 2 mil (0.05 mm) |
| Internal Ring Minimum | 0 mil (breakout allowed) | 0 mil (breakout allowed) | 1 mil (0.025 mm) |
| Breakout Policy | Permitted | 90° breakout allowed | Not permitted |
| Tangency Policy | Permitted | Permitted with conditions | Not permitted |
| Teardrop Requirement | Not required | Recommended <20 mil traces | Mandatory |
| Governing Standard | IPC-6012 Class 1 | IPC-6012 Class 2 | IPC-6012 Class 3 / -ES / -EM / -EA |
| Relative Mfg. Cost | Lowest | Moderate | Highest (~2× Class 2) |
Frequently Asked Questions
Q1: What is the difference between tangency and breakout?
Tangency occurs when the drilled hole is slightly off-center and its outer edge just touches the outer edge of the copper pad, leaving effectively zero ring width on one side. Breakout is more severe: the drill exits the pad boundary entirely, leaving no copper on that side and creating a risk of open circuit. Under IPC-6012, Class 1 and 2 boards permit 90-degree breakout provided the connection remains functional, while Class 3 boards permit neither tangency nor breakout.
Q2: How do I calculate the correct pad diameter for a given IPC class?
Use the formula: Pad Diameter = Finished Hole Diameter + 2 × (Minimum Annular Ring) + Fabrication Allowance. For a Class 3 board with a 0.3 mm (12 mil) finished hole, a 2 mil minimum ring, and an 8 mil fabrication allowance: Pad = 12 + 2(2) + 8 = 24 mil (0.61 mm). Add 2 mil for boards with more than 8 layers or copper weight above 1 oz/ft².
Q3: Can I use the same annular ring size for internal and external layers?
No. IPC standards measure external and internal rings differently. External rings are measured from the edge of the copper-plated via wall to the pad edge, while internal rings are measured from the raw drilled hole edge. Because plating adds approximately 1 mil to the hole wall, the same physical pad produces an external ring reading that is ~1 mil smaller than the internal reading. For Class 3, specify 2 mil minimum externally and 1 mil minimum internally.
Q4: When should I add teardrop pads to my via annular rings?
Teardrops should be added whenever a trace narrower than 20 mil (0.5 mm) connects to a via, on all vias in Class 3 designs, and on all vias in flex or rigid-flex PCBs subject to bending or vibration. Teardrops add a gradual copper fillet at the trace-to-pad junction, preventing trace severance if the drill slightly encroaches on that side, and improving resistance to fatigue cracking at the copper-laminate interface.
Q5: How does HDI microvia design change annular ring requirements?
Laser-drilled microvias (typically 0.075–0.125 mm diameter) are governed by IPC-2226 rather than IPC-2221. The minimum annular ring for HDI microvias under IPC-2226 Level B is 0.025 mm (1 mil) — achievable because laser drilling achieves positional accuracy better than ±0.5 mil, far tighter than mechanical CNC drilling. Designers should also ensure microvias are properly filled and planarized to ±5 µm before placing components or via-in-pad structures on top.
What You Can Find in LCSC
LCSC Electronics — the component sourcing platform operated by JLCPCB’s parent company EasyEDA — carries an extensive catalogue of through-hole and SMD components that pair directly with the annular ring specifications discussed in this article. Whether you are designing to IPC Class 2 tolerances for an industrial controller or Class 3 standards for a medical device, LCSC provides a single-source destination for the passive and active components your PCB layout requires.
LCSC also provides competitive pricing on popular IPC-compliant components from both international brands and high-quality Asian manufacturers, making it a practical sourcing option for prototype quantities through volume production. With real-time stock visibility and global shipping to over 200 countries, engineers can move from validated PCB design to component procurement without switching platforms — a meaningful efficiency gain on time-sensitive projects.
