ChipON KF32L530MQV

The KF32L530 series MCU is developed based on the KF32 core architecture. KF32 is a high-performance processor core featuring a 32-bit three-stage pipeline structure. The KF32L530 series MCU incorporates an efficient instruction set based on mixed 16-bit/32-bit instructions and supports multiple operating modes. Developers and users can manufacture PCBs using unprogrammed MCUs and then perform in-system programming, debugging, and other operations. With just a computer, a USB download cable, and a programmer, the firmware on the MCU can be updated at any time and from any location. The MCU provides 6 base clock oscillator options: internal high-frequency (INTHF), internal low-frequency (INTLF), external high-frequency (EXTHF), external low-frequency (EXTLF), internal PLL, and low-power 4M clock (LP4M). The internal PLL can multiply the output clocks of INTHF and EXTHF to provide higher-frequency operating clock options, serving as the base clock for system and peripheral operation. Through register configuration, 4 clock sources required for system and peripheral operation can be derived from the 6 oscillators: the system main clock (SCLK), low-frequency peripheral clock (LFCLK), high-frequency peripheral clock (HFCLK), and 48MHz clock (CK48M), meeting different requirements. In addition, the internal low-frequency oscillator can also be used directly as the clock source for the watchdog timer, clock failure detection, or other low-power peripherals. After a system reset, the INTHF oscillator is selected as the system clock. When a system clock switch is required, the clock source switchover occurs only after the target clock source is ready (i.e., the clock source is stable and the delay flag bit is set to 1).

• 32-bit high-performance KungFu32 core
• Operating frequency up to 120MHz, software-adjustable
• Efficient instruction set based on 16-bit/32-bit mixed instructions
• 3-stage pipeline
• 32×32 single-cycle multiplication, 32÷32 hardware division
• Interrupt priority handling with automatic interrupt stack
• 13 32-bit general-purpose registers R0~R12
• Link register (R13)
• Stack pointer register (R14)
• Program counter (R15)
• 24-bit SysTick timer
• Up to 512KByte FLASH with ECC
• Up to 128KByte RAM, including 32KByte with ECC
• 3× 256Byte dual-port RAM with ECC
• 1× 512Byte dual-port RAM with ECC
• 16KByte boot ROM
• FLASH endurance: 100,000 write cycles
• Integrated power-on reset circuit
• Low-voltage detection and low-voltage reset
• Programmable voltage detection
• Hardware dual watchdog
• 6 system clock sources selectable
• Two-wire serial programming/online debugging support
• LQFP100 package: 85 general-purpose I/Os
• LQFP64 package: 53 general-purpose I/Os
• QFN48 package: 42 general-purpose I/Os
• Configurable I/O settings
• Built-in pull-up/pull-down support
• Push-pull and open-drain output modes
• Digital/analog pin configuration
• Pin function remapping
• Schmitt trigger input
• Timer 5/6: advanced timers with ECCP5 support
• Timer 1/2/3/4/18/19/22/23: general-purpose timers with CCP1/2/3/4/18/19/22/23 support
• Timer 20/21: 32-bit general-purpose timers with CCP20/21 support respectively
• Timer 0: 16-bit low-power general-purpose timer with CCP0 support
• Timer 14/15: basic timers
• Timer 7: QEI0 support
• 2× 7-channel DMA
• 1× hardware CRC32 module
• 4× SPI bus modules (I2S-compatible)
• 4× I2C bus modules (SMBUS/PMBUS-compatible)
• 8× USART modules (7816/LIN/IRDA-compatible), including 1 low-power USART
• 3× CAN2.0B modules, including 1 low-power CAN
• 1× USB module
• 1× EXIC module compatible with 8080 mode
• 1× independent RTC (perpetual calendar)
• 1× LCD display module supporting 8×44/4×48 mode
• 1× touch module
• 2× 12-bit ADC modules supporting up to 41 channels
• 2× DAC modules
• 4× CMP comparator modules
• 2× programmable gain amplifier (OP) modules
• 5 power modes: normal run mode, sleep mode, stop mode, standby mode, shutdown mode
• Operating voltage: 1.8V~3.6V
• Operating temperature range: -40~85°C