TI SN74ALS175N
| Fabricante | |
| N.º de pieza fab. | SN74ALS175N |
| Nº LCSC | C1549930 |
| Emb. | PDIP-16 |
| Número de Cliente | |
| Atrib. clave | 4.5V~5.5V 4 1 17ns@5V,50pF PDIP-16 Flip Flops RoHS |
| Hoja de Datos | TI SN74ALS175N |
| Cumplimiento RoHS | 1 documentos disponibles |
Especificaciones del Producto
| Tipo | Descripción | |
|---|---|---|
| Categoría | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Fabricante | TI | |
| Emb. | PDIP-16 | |
| Operating Temperature | 0℃~+70℃ | |
| Voltage - Supply | 4.5V~5.5V | |
| Number of Bits per Element | 4 | |
| Series | 74ALS Series | |
| Output Type | Complementary | |
| Number of Elements | 1 | |
| Current - Output High(IOH) | 400uA | |
| Current - Output Low(IOL) | 8mA | |
| Quiescent Current | 14mA | |
| Propagation Delay | 17ns@5V,50pF | |
| Trigger Type | Rising Edge |
| Tipo | Descripción | |
|---|---|---|
| Categoría | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Fabricante | TI | |
| Emb. | PDIP-16 | |
| Operating Temperature | 0℃~+70℃ | |
| Voltage - Supply | 4.5V~5.5V | |
| Number of Bits per Element | 4 | |
| Series | 74ALS Series |
| Tipo | Descripción | |
|---|---|---|
| Output Type | Complementary | |
| Number of Elements | 1 | |
| Current - Output High(IOH) | 400uA | |
| Current - Output Low(IOL) | 8mA | |
| Quiescent Current | 14mA | |
| Propagation Delay | 17ns@5V,50pF | |
| Trigger Type | Rising Edge |
Descripción
These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct-clear (CLR) input. The ’ALS175 and ’AS175B feature complementary outputs from each flip-flop.
Information at the data (D) inputs meeting the setup-time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D-input signal has no effect at the output.
These circuits are fully compatible for use with most TTL circuits.
Características
- Fully Buffered Outputs for Maximum Isolation From External Disturbances (’AS Only)
Aplicaciones
- Buffer/Storage Registers
- Shift Registers
- Pattern Generators
| Cant. | Prec. unit.(Solo como referencia) | Importo total |
|---|---|---|
| 1+ | $ 0.4442 | $ 0.44 |
| 200+ | $ 0.172 | $ 34.40 |
| 500+ | $ 0.1659 | $ 82.95 |
| 1,000+ | $ 0.1629 | $ 162.90 |
Encapsulado Estándar25/Full Tube | ||
Especificaciones del Producto
| Tipo | Descripción | |
|---|---|---|
| Categoría | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Fabricante | TI | |
| Emb. | PDIP-16 | |
| Operating Temperature | 0℃~+70℃ | |
| Voltage - Supply | 4.5V~5.5V | |
| Number of Bits per Element | 4 | |
| Series | 74ALS Series | |
| Output Type | Complementary | |
| Number of Elements | 1 | |
| Current - Output High(IOH) | 400uA | |
| Current - Output Low(IOL) | 8mA | |
| Quiescent Current | 14mA | |
| Propagation Delay | 17ns@5V,50pF | |
| Trigger Type | Rising Edge |
| Tipo | Descripción | |
|---|---|---|
| Categoría | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Fabricante | TI | |
| Emb. | PDIP-16 | |
| Operating Temperature | 0℃~+70℃ | |
| Voltage - Supply | 4.5V~5.5V | |
| Number of Bits per Element | 4 | |
| Series | 74ALS Series |
| Tipo | Descripción | |
|---|---|---|
| Output Type | Complementary | |
| Number of Elements | 1 | |
| Current - Output High(IOH) | 400uA | |
| Current - Output Low(IOL) | 8mA | |
| Quiescent Current | 14mA | |
| Propagation Delay | 17ns@5V,50pF | |
| Trigger Type | Rising Edge |
Descripción
These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct-clear (CLR) input. The ’ALS175 and ’AS175B feature complementary outputs from each flip-flop.
Information at the data (D) inputs meeting the setup-time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D-input signal has no effect at the output.
These circuits are fully compatible for use with most TTL circuits.
Características
- Fully Buffered Outputs for Maximum Isolation From External Disturbances (’AS Only)
Aplicaciones
- Buffer/Storage Registers
- Shift Registers
- Pattern Generators
C1549930 Biblioteca EasyEDA
Cumplimiento & Códigos de Exportación
| Tipo | Detalles |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Tipo | Detalles |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Tipo | Detalles |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |