Imagens ilustrativas
Modelos EDAEasyEDA
AMD/XILINX XC9572XL-10VQ44C
| Fabricante | |
| Cód. da peça | XC9572XL-10VQ44C |
| Nº LCSC | C1521389 |
| Emb. | VQFP-44(10x10) |
| Número do Cliente | |
| Atrib. princ. | High Performance CPLD |
| Folha de Dados | AMD/XILINX XC9572XL-10VQ44C |
| Conformidade RoHS | 1 documentos disponíveis |
Especificações do Produto
Tudo
| Tipo | Descrição | |
|---|---|---|
| Categoria | Integrated Circuits (ICs)/Embedded/FPGAs (Field Programmable Gate Array) | |
| Fabricante | AMD/XILINX | |
| Emb. | VQFP-44(10x10) |
| Tipo | Descrição | |
|---|---|---|
| Categoria | Integrated Circuits (ICs)/Embedded/FPGAs (Field Programmable Gate Array) | |
| Fabricante | AMD/XILINX |
| Tipo | Descrição | |
|---|---|---|
| Emb. | VQFP-44(10x10) |
Ajuda e FeedbackMostrar produtos similares (0) >
Descrição
Tradução por IA
The XC9572XL is a 3.3V CPLD targeted for high-performance, low-voltage applications in leading-edge communications and computing systems. It is comprised of four 54V18 Function Blocks, providing 1,600 usable gates with propagation delays of 5 ns.
Recursos
Tradução por IA
- 5 ns pin-to-pin logic delays
- System frequency up to 178 MHz
- 72 macrocells with 1,600 usable gates
- Available in small footprint packages
- 44-pin PLCC (34 user I/O pins)
- 44-pin VQFP (34 user I/O pins)
- 48-pin CSP (38 user I/O pins)
- 64-pin VQFP (52 user I/O pins)
- 100-pin TQFP (72 user I/O pins)
- Pb-free available for all packages
- Optimized for high-performance 3.3V systems
- Low power operation
- 5V tolerant I/O pins accept 5V, 3.3V, and 2.5V signals
- 3.3V or 2.5V output capability
- Advanced 0.35 micron feature size CMOS
- Fast FLASH technology
- Advanced system features
- In-system programmable
- Superior pin-locking and routability with Fast CONNECT II switch matrix
- Extra wide 54-input Function Blocks
- Up to 90 product-terms per macrocell with individual product-term allocation
- Local clock inversion with three global and one product-term clocks
- Individual output enable per output pin
- Input hysteresis on all user and boundary-scan pin inputs
- Bus-hold circuitry on all user pin inputs
- Full IEEE Standard 1149.1 boundary-scan (JTAG)
- Fast concurrent programming
- Slew rate control on individual outputs
- Enhanced data security features
- Excellent quality and reliability
- Endurance exceeding 10,000 program/erase cycles
- 20 year data retention
- ESD protection exceeding 2,000V
- Pin-compatible with 5V-core XC9572 device in the 44-pin PLCC package and the 100-pin TQFP package
Garantia em cada pedido
100% Autêntico · Devolução ou Substituição em 30 Dias
Fora de estoque
Avise-me
Mínimo: 1Múltiplo: 1Unidade de venda: Piece
Adicionar à Lista BOM
| Qtd. | Preço unit.(Apenas para referência) | Valor total |
|---|---|---|
| 1+ | $ 7.046 | $ 7.05 |
| 10+ | $ 6.0441 | $ 60.44 |
| 30+ | $ 5.4334 | $ 163.00 |
| 100+ | $ 4.9224 | $ 492.24 |
Encapsulamento Padrão160/Full Tray | ||
Melhor preço para maior quantidade?
$
Especificações do Produto
Tudo
| Tipo | Descrição | |
|---|---|---|
| Categoria | Integrated Circuits (ICs)/Embedded/FPGAs (Field Programmable Gate Array) | |
| Fabricante | AMD/XILINX | |
| Emb. | VQFP-44(10x10) |
| Tipo | Descrição | |
|---|---|---|
| Categoria | Integrated Circuits (ICs)/Embedded/FPGAs (Field Programmable Gate Array) | |
| Fabricante | AMD/XILINX |
| Tipo | Descrição | |
|---|---|---|
| Emb. | VQFP-44(10x10) |
Ajuda e FeedbackMostrar produtos similares (0) >
Descrição
Tradução por IA
The XC9572XL is a 3.3V CPLD targeted for high-performance, low-voltage applications in leading-edge communications and computing systems. It is comprised of four 54V18 Function Blocks, providing 1,600 usable gates with propagation delays of 5 ns.
Recursos
Tradução por IA
- 5 ns pin-to-pin logic delays
- System frequency up to 178 MHz
- 72 macrocells with 1,600 usable gates
- Available in small footprint packages
- 44-pin PLCC (34 user I/O pins)
- 44-pin VQFP (34 user I/O pins)
- 48-pin CSP (38 user I/O pins)
- 64-pin VQFP (52 user I/O pins)
- 100-pin TQFP (72 user I/O pins)
- Pb-free available for all packages
- Optimized for high-performance 3.3V systems
- Low power operation
- 5V tolerant I/O pins accept 5V, 3.3V, and 2.5V signals
- 3.3V or 2.5V output capability
- Advanced 0.35 micron feature size CMOS
- Fast FLASH technology
- Advanced system features
- In-system programmable
- Superior pin-locking and routability with Fast CONNECT II switch matrix
- Extra wide 54-input Function Blocks
- Up to 90 product-terms per macrocell with individual product-term allocation
- Local clock inversion with three global and one product-term clocks
- Individual output enable per output pin
- Input hysteresis on all user and boundary-scan pin inputs
- Bus-hold circuitry on all user pin inputs
- Full IEEE Standard 1149.1 boundary-scan (JTAG)
- Fast concurrent programming
- Slew rate control on individual outputs
- Enhanced data security features
- Excellent quality and reliability
- Endurance exceeding 10,000 program/erase cycles
- 20 year data retention
- ESD protection exceeding 2,000V
- Pin-compatible with 5V-core XC9572 device in the 44-pin PLCC package and the 100-pin TQFP package
Conformidade & Códigos de Exportação
| Tipo | Detalhes |
|---|---|
| RoHS | ROHS Compliant |
| ECCN | EAR99 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Tipo | Detalhes |
|---|---|
| RoHS | ROHS Compliant |
| ECCN | EAR99 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Tipo | Detalhes |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS | |