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MICROCHIP PIC24FV32KA302-I/SP

제조업체
제조사 품번
PIC24FV32KA302-I/SP
LCSC 번호
C643634
포장
SPDIP-28
고객 번호
주요 제원
PIC 16 Bit 32MHz SPDIP-28 Microcontrollers RoHS
데이터시트MICROCHIP PIC24FV32KA302-I/SP
RoHS 준수2개 문서 이용 가능
대체 부품4
모든 주문 보장
100% 정품 · 30일 반품 또는 교환
품절
재입고 알림
최소값: 1배수: 1판매 단위: Piece
BOM 목록에 추가
수량단가(참고용)총액
1+$ 6.0029$ 6.00
10+$ 5.8618$ 58.62
30+$ 5.7688$ 173.06
100+$ 5.6758$ 567.58
표준 패키지15/Full Tube
수량이 많을수록 더 좋은 가격?
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제품 사양

전체
타입설명
카테고리Integrated Circuits (ICs)/Embedded/Microcontrollers
제조업체MICROCHIP
포장SPDIP-28
ADC (Bit)12bit
Number of I/O23
Operating Temperature-40℃~+85℃
Program Memory TypeFLASH
Voltage - Supply2V~5.5V
EEPROM512Byte
Program Storage Size32KB
CPU CorePIC
Core Size16 Bit
CPU Maximum Speed32MHz
Oscillator TypeBuilt-in
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주요 특징

AI 번역
  • Power Management Modes:
    • Run – CPU, Flash, SRAM and Peripherals On
    • Doze – CPU Clock Runs Slower than Peripherals
    • Idle – CPU Off, Flash, SRAM and Peripherals On
    • Sleep – CPU, Flash and Peripherals Off, and SRAM On
    • Deep Sleep – CPU, Flash, SRAM and Most Peripherals Off; Multiple Autonomous Wake-up Sources
    • Low-Power Consumption:
      • Run mode currents down to 8 μA, typical
      • Idle mode currents down to 2.2 μA, typical
      • Deep Sleep mode currents down to 20 nA, typical
      • Real-Time Clock/Calendar currents down to 700 nA, 32 kHz, 1.8V
      • Watchdog Timer is 500 nA, 1.8V typical
  • High-Performance CPU:
    • Modified Harvard Architecture
    • Up to 16 MIPS Operation @ 32 MHz
    • 8 MHz Internal Oscillator with 4x PLL Option and Multiple Divide Options
    • 17-Bit by 17-Bit Single-Cycle Hardware Multiplier
    • 32-Bit by 16-Bit Hardware Divider, 16-Bit x 16-Bit Working Register Array
    • C Compiler Optimized Instruction Set Architecture
  • Peripheral Features:
    • Hardware Real-Time Clock and Calendar (RTCC):
      • Provides clock, calendar and alarm functions
      • Can run in Deep Sleep mode
      • Can use 50/60 Hz power line input as clock source
    • Programmable 32-Bit Cyclic Redundancy Check (CRC)
    • Multiple Serial Communication modules:
      • Two 3/4 -wire SPI modules
      • Two I²C modules with multi-master/slave support
      • Two UART modules, supporting RS-485, RS-232, LIN/J2602
    • Five 16-Bit Timers/Counters with Programmable Prescaler:
      • Can be paired as 32-bit timers/counters
    • Three 16-Bit Capture Inputs with Dedicated Timers
    • Three 16-Bit Compare/PWM Outputs with Dedicated Timers
    • Configurable Open-Drain Outputs on Digital I/O Pins
    • Up to Three External Interrupt Sources
  • Analog Features:
    • 12-Bit, Up to 16-Channel Analog-to-Digital Converter:
      • 100 ksps conversion rate
      • Conversion available during Sleep and Idle
      • Auto-sampling, timer-based option for Sleep and Idle modes
      • Wake on auto-compare option
    • Dual Rail-to-Rail Analog Comparators with Programmable Input/Output Configuration
    • On-Chip Voltage Reference
    • Internal Temperature Sensor
    • Charge Time Measurement Unit (CTMU):
      • Used for capacitance sensing, 16 channels
      • Time measurement, down to 200 ps resolution
      • Delay/pulse generation, down to 1 ns resolution
  • Special Microcontroller Features:
    • Wide Operating Voltage Range:
      • 1.8V to 3.6V (PIC24F devices)
      • 2.0V to 5.5V (PIC24FV devices)
    • Low-Power Wake-up Sources and Supervisors:
      • Ultra Low-Power Wake-up (ULPWU) for Sleep/Deep Sleep
      • Low-Power Watchdog Timer (DSWDT) for Deep Sleep
      • Extreme Low-Power Brown-out Reset (DSBOR) for Deep Sleep, LPBOR for all other modes
    • System Frequency Range Declaration bits:
      • Declaring the frequency range optimizes the current consumption.
    • Standard Watchdog Timer (WDT) with On-Chip, Low-Power RC Oscillator for Reliable Operation
    • Programmable High/Low-Voltage Detect (HLVD)
    • Standard Brown-out Reset (BOR) with 3 Programmable Trip Points that can be Disabled in Sleep
    • High-Current Sink/Source (18 mA/18 mA) on All I/O Pins
    • Flash Program Memory:
      • Erase/write cycles: 10,000 minimum
      • 40 years’ data retention minimum
    • Data EEPROM:
      • Erase/write cycles: 100,000 minimum
      • 40 years’ data retention minimum
    • Fail-Safe Clock Monitor (FSCM)
    • Programmable Reference Clock Output
    • Self-Programmable under Software Control
    • In-Circuit Serial Programming (ICSP) and In-Circuit Debug (ICD) via 2 Pins

대체 부품

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