Infineon/CYPRESS CY62148DV30LL-70BVI

This device is a high-performance CMOS SRAM organized as 512K words × 8 bits. It employs advanced circuit design to provide ultra-low operating current, making it well suited for extending battery life in portable applications. The device also features automatic power-down, which significantly reduces power consumption. When the device is deselected, it can enter standby mode to reduce power consumption. Write operations are accomplished by asserting chip enable and write enable inputs low. Read operations are accomplished by asserting chip enable and output enable low while forcing write enable high. When the device is deselected, the output is disabled, or a write operation is in progress, the eight I/O pins will be in a high-impedance state.

• Very high speed: 55ns
• Wide voltage range: 2.20V to 3.60V
• Pin-compatible with CY62148CV25, CY62148CV30, and CY62148CV33
• Ultra-low active power consumption: typical operating current of 1.5mA (at 1MHz), typical operating current of 8mA (at maximum frequency, i.e., 55ns speed)
• Ultra-low standby power consumption
• Easy memory expansion via chip enable and output enable features
• Automatic power-down when deselected
• CMOS technology for optimized speed-to-power ratio
• Available packages: 36-ball BGA, 32-pin TSOP II, and 32-pin SOIC

• Mobile phones