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TI SN74LV08ATPWRG4Q1

Fabricante
TI
N.º de pieza fab.
SN74LV08ATPWRG4Q1
Nº LCSC
C2877126
Emb.
TSSOP-14
Número de Cliente
Atrib. clave
QUADRUPLE 2-INPUT POSITIVE-AND GATE
Hoja de DatosTI SN74LV08ATPWRG4Q1
Cumplimiento RoHS2 documentos disponibles
Piezas alternativas5
Garantía en cada pedido
100% Auténtico · Devolución o Reemplazo en 30 Días

Especificaciones del Producto

Todo
TipoDescripción
CategoríaIntegrated Circuits (ICs)/Logic/Gates and Inverters
FabricanteTI
Emb.TSSOP-14
FeaturesLocal shutdown mode
Operating Temperature-40℃~+105℃
Input Logic Level - Low500mV
Logic Family74LV Series
Input Logic Level - High1.5V
Output Logic Level - High2V;2.48V;3.8V
Quiescent Current(Iq)20uA
Voltage - Supply2V~5.5V
Current - Output High(IOH)12mA
Number of Channels4;2
Output Logic Level - Low400mV;440mV;550mV
Propagation Delay7.9ns@5V,50pF
Current - Output Low(IOL)12mA
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Descripción

Traducción por IA

This quadruple 2-input positive-AND gate is designed for 2-V to 5.5 V V(CC) operation. The SN74LV08A performs the Boolean function Y = A • B or Y = (A(overline) + B(overline))(overline) in positive logic. This device is fully specified for partial-power-down applications using I(0P). The I(0f)f circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Características

Traducción por IA
  • Qualified for Automotive Applications
  • Typical V(0LP) (Output Ground Bounce) < 0.8 V at V(CC) = 3.3 V, TA = 25 ℃
  • Typical Y(0HV) (Output V(0H) Undershoot) > 2.3 V at V(CC) = 3.3 V, TA = 25 ℃
  • Supports Mixed-Mode Voltage Operation on All Ports
  • I(off) Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22:
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

Aplicaciones

Traducción por IA
  • Automotive electronic circuit applications
  • Digital systems requiring 2-input AND logic processing