ams TSL1406RS
| Produttore | |
| Cod. Prod. | TSL1406RS |
| Cod. LCSC | C19508514 |
| Imballo | - |
| Numero Cliente | |
| Attr. chiave | Sensor Evaluation Boards |
| Scheda Tecnica | ams TSL1406RS |
Specifiche del Prodotto
| Tipo | Descrizione | |
|---|---|---|
| Categoria | Development Boards, Kits, Programmers/Evaluation Boards/Sensor Evaluation Boards | |
| Produttore | ams | |
| Imballo | - | |
| Features | - |
| Tipo | Descrizione | |
|---|---|---|
| Categoria | Development Boards, Kits, Programmers/Evaluation Boards/Sensor Evaluation Boards | |
| Produttore | ams |
| Tipo | Descrizione | |
|---|---|---|
| Imballo | - | |
| Features | - |
Descrizione
The TSL1406R is a 400 dots-per-inch (DPI) linear sensor array consisting of two 384-pixel sections, each with its own output. These sections are arranged as a continuous 768×1 pixel array. The device integrates pixel data hold functionality, providing simultaneous integration start and stop times for all pixels. The pixel dimensions are 63.5μm×55.5μm, with a pixel center-to-center pitch of 63.5μm and a pixel gap of 8μm. Internal logic simplifies operation, requiring only a single serial input (SI) pulse and a clock. The device operates from a single 5V supply. The two 384-pixel sections can be read out independently or cascaded to provide a single 768-pixel output. The TSL1406RS is the same device mounted in a shorter package. These devices are suitable for a wide range of applications, including mark and code reading, optical character recognition (OCR) and contact imaging, edge detection and positioning, and optical encoding. The sensor consists of 768 photodiodes (referred to as pixels) arranged in a linear array. Light incident on the pixels generates a photocurrent, which is then integrated by an active integration circuit associated with each pixel. During integration, a sampling capacitor is connected to the integrator output through an analog switch. The charge accumulated by each pixel is proportional to the light intensity and integration time at that pixel. The integrator output and reset are controlled by a 384-bit shift register and reset logic. An output cycle is initiated by applying a logic 1 to SI. When SI1 and HOLD1 are connected together, a signal called HOLD is generated from the rising edge of SI1. This disconnects all 384 sampling capacitors from their respective integrators and initiates the integrator reset cycle. As the SI pulse is clocked through the shift register, the charge stored on each sampling capacitor is sequentially connected to a charge-coupled output amplifier, which produces a voltage on the analog output AO. The integrator reset cycle ends 18 clock cycles after the SI pulse is applied. The next integration period then begins. On the 384th clock rising edge, the SI pulse is output from the SO1 pin (Section 1) and becomes the SI pulse for Section 2 (when SO1 is connected to SI2). The rising edge of the 385th clock cycle terminates the SO1 pulse and places the Section 1 analog output AO into a high-impedance state. Similarly, SO2 is output on the 768th clock pulse. Note that a 769th clock pulse is required to terminate the SO2 pulse and return Section 2's AO to a high-impedance state. If minimum integration time is required, the next SI pulse can be applied after a minimum delay tqt (pixel charge transfer time) following the 769th clock pulse. Section 1 and Section 2 can be operated in parallel or serial mode. AO is an op-amp type output that does not require an external pull-down resistor. This design allows rail-to-rail output voltage swing. With VDD = 5V, the nominal output is 0V with no light input, the typical white level is 2V, and the saturated light level is 4.8V. When the device is not in the output phase, AO is in a high-impedance state. The voltage produced at the analog output (AO) is given by: Vout = Vdrk + (Re)(Ee)(tint) Where: Vout is the analog output voltage under white conditions Vdrk is the analog output voltage under dark conditions Re is the device responsivity for light at a given wavelength, in units of V/(μJ/cm²) Ee is the incident irradiance, in units of μW/cm² tint is the integration time, in seconds A 0.1μF bypass capacitor should be connected between VDD and ground as close to the device as possible.
Caratteristiche
- 768×1 sensor element array
- 400 dots per inch (DPI) sensor pitch
- High linearity and uniformity
- Wide dynamic range…4000:1 (72 dB)
- Output referenced to ground
- Low image lag…0.5% typical
- Operating frequency up to 8 MHz
- Single 3V to 5V supply
- Rail-to-rail output swing (AO)
- No external load resistor required
- Drop-in replacement for TSL1406
Applicazioni
- Mark and code reading
- Optical character recognition (OCR) and contact imaging
- Edge detection and positioning
- Optical encoding
| Qtà | Pr. unit.(Solo per riferimento) | Importo totale |
|---|---|---|
| 1+ | $ 64.999 | $ 65.00 |
| 200+ | $ 25.9347 | $ 5186.94 |
| 480+ | $ 25.0684 | $ 12032.83 |
| 1,000+ | $ 24.6405 | $ 24640.50 |
Package Standard40/Full Bag | ||
Specifiche del Prodotto
| Tipo | Descrizione | |
|---|---|---|
| Categoria | Development Boards, Kits, Programmers/Evaluation Boards/Sensor Evaluation Boards | |
| Produttore | ams | |
| Imballo | - | |
| Features | - |
| Tipo | Descrizione | |
|---|---|---|
| Categoria | Development Boards, Kits, Programmers/Evaluation Boards/Sensor Evaluation Boards | |
| Produttore | ams |
| Tipo | Descrizione | |
|---|---|---|
| Imballo | - | |
| Features | - |
Descrizione
The TSL1406R is a 400 dots-per-inch (DPI) linear sensor array consisting of two 384-pixel sections, each with its own output. These sections are arranged as a continuous 768×1 pixel array. The device integrates pixel data hold functionality, providing simultaneous integration start and stop times for all pixels. The pixel dimensions are 63.5μm×55.5μm, with a pixel center-to-center pitch of 63.5μm and a pixel gap of 8μm. Internal logic simplifies operation, requiring only a single serial input (SI) pulse and a clock. The device operates from a single 5V supply. The two 384-pixel sections can be read out independently or cascaded to provide a single 768-pixel output. The TSL1406RS is the same device mounted in a shorter package. These devices are suitable for a wide range of applications, including mark and code reading, optical character recognition (OCR) and contact imaging, edge detection and positioning, and optical encoding. The sensor consists of 768 photodiodes (referred to as pixels) arranged in a linear array. Light incident on the pixels generates a photocurrent, which is then integrated by an active integration circuit associated with each pixel. During integration, a sampling capacitor is connected to the integrator output through an analog switch. The charge accumulated by each pixel is proportional to the light intensity and integration time at that pixel. The integrator output and reset are controlled by a 384-bit shift register and reset logic. An output cycle is initiated by applying a logic 1 to SI. When SI1 and HOLD1 are connected together, a signal called HOLD is generated from the rising edge of SI1. This disconnects all 384 sampling capacitors from their respective integrators and initiates the integrator reset cycle. As the SI pulse is clocked through the shift register, the charge stored on each sampling capacitor is sequentially connected to a charge-coupled output amplifier, which produces a voltage on the analog output AO. The integrator reset cycle ends 18 clock cycles after the SI pulse is applied. The next integration period then begins. On the 384th clock rising edge, the SI pulse is output from the SO1 pin (Section 1) and becomes the SI pulse for Section 2 (when SO1 is connected to SI2). The rising edge of the 385th clock cycle terminates the SO1 pulse and places the Section 1 analog output AO into a high-impedance state. Similarly, SO2 is output on the 768th clock pulse. Note that a 769th clock pulse is required to terminate the SO2 pulse and return Section 2's AO to a high-impedance state. If minimum integration time is required, the next SI pulse can be applied after a minimum delay tqt (pixel charge transfer time) following the 769th clock pulse. Section 1 and Section 2 can be operated in parallel or serial mode. AO is an op-amp type output that does not require an external pull-down resistor. This design allows rail-to-rail output voltage swing. With VDD = 5V, the nominal output is 0V with no light input, the typical white level is 2V, and the saturated light level is 4.8V. When the device is not in the output phase, AO is in a high-impedance state. The voltage produced at the analog output (AO) is given by: Vout = Vdrk + (Re)(Ee)(tint) Where: Vout is the analog output voltage under white conditions Vdrk is the analog output voltage under dark conditions Re is the device responsivity for light at a given wavelength, in units of V/(μJ/cm²) Ee is the incident irradiance, in units of μW/cm² tint is the integration time, in seconds A 0.1μF bypass capacitor should be connected between VDD and ground as close to the device as possible.
Caratteristiche
- 768×1 sensor element array
- 400 dots per inch (DPI) sensor pitch
- High linearity and uniformity
- Wide dynamic range…4000:1 (72 dB)
- Output referenced to ground
- Low image lag…0.5% typical
- Operating frequency up to 8 MHz
- Single 3V to 5V supply
- Rail-to-rail output swing (AO)
- No external load resistor required
- Drop-in replacement for TSL1406
Applicazioni
- Mark and code reading
- Optical character recognition (OCR) and contact imaging
- Edge detection and positioning
- Optical encoding
Conformità & Codici di Esportazione
| Tipo | Dettagli |
|---|---|
| ECCN | - |
| CNHTS | 8542391000 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Tipo | Dettagli |
|---|---|
| ECCN | - |
| CNHTS | 8542391000 |
| USHTS | |
| TARIC |
| Tipo | Dettagli |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |

