NXP LPC824M201JDH20J

LPC82x is a low-cost 32-bit MCU series device based on ARM Cortex-M0+. The CPU frequency can reach up to 30 MHz during operation. LPC82x supports up to 32 KB flash memory and 8 KB SRAM. The supporting peripherals of LPC82x include a CRC engine, four I2C bus interfaces, up to three USARTs, up to two SPI interfaces, a multi-rate timer, a self-wake-up timer, a state-configurable timer with PWM function (SCTimer/PWM), a DMA, a 12-bit ADC, an analog comparator, a functionally configurable I/O port (configurable via a switch matrix), an input pattern matching engine, and up to 29 general-purpose I/O pins.

• High-speed GPIO interface connected to the ARM Cortex-M0+ IO bus, integrating up to 29 general-purpose I/O (GPIO) pins, with configurable pull-up/pull-down resistors, programmable open-drain mode, input inverter, and digital filter. GPIO direction control supports setting/clearing/toggling individual bits separately.
• Four pins have high-current source output drive capability (20 mA).
• Two true open-drain pins have high-current sink drive capability (20 mA).
• GPIO interrupt generation function, 8 GPIO inputs have Boolean pattern matching function.
• Switch matrix for flexible configuration of each I/O pin function.
• CRC engine.
• DMA with 18 channels and 9 trigger inputs.
• State-configurable timer (SCTimer/PWM) with input and output functions (including capture and match) for timing and PWM applications. Each SCTimer/PWM input is multiplexed to allow selection from multiple input sources (such as pins, ADC interrupts, or comparator outputs).
• Four-channel multi-rate timer (MRT), generating repeatable interrupts at up to 4 programmable fixed rates.
• Self-wake-up timer (WKT), using IRC or a low-power, low-frequency internal oscillator or an external clock input in the always-powered domain as the clock input.
• Window watchdog timer (WWDT).
• A 12-bit ADC with up to 12 input channels and multiple internal and external trigger inputs and a sampling rate of up to 1.2 MS/s. The ADC supports two independent conversion sequences.
• Comparator with four input pins and external or internal reference voltage.
• Three USART interfaces, with pin functions assigned via a switch matrix and a common fractional baud rate generator.
• Two SPI controllers, with pin functions assigned via a switch matrix.
• Four I2C bus interfaces. One I2C supports ultra-fast mode (data rate of 1 Mbit/s on two true open-drain pins) and listen mode. Three I2Cs support data rates up to 400 kbit/s (standard digital pins).
• A 12 MHz internal RC oscillator with an accuracy adjusted to 1.5%, which can be selectively used as the system clock.
• Crystal oscillator, operating frequency range from 1 MHz to 25 MHz.
• Programmable watchdog oscillator with a frequency range from 9.4 kHz to 2.3 MHz.
• PLL allows the CPU to run at the highest CPU main frequency without a high-frequency crystal. It can be run via the system oscillator, external clock input, or internal RC oscillator.
• Clock output function with a divider, which can reflect all internal clock sources.
• In the low-current mode using IRC as the clock source, the power consumption in the operating mode is as low as 90 uA/MHz.
• Integrated PMU (Power Management Unit) for reducing power consumption.
• Low-power modes: sleep mode, deep sleep mode, power-down mode, and deep power-down mode.
• Wake up from deep sleep and power-down modes by activity on USART, SPI, and I2C peripherals.
• Self-wake up from deep power-down mode controlled by a timer.
• Power-on reset (POR).
• Brown-out detection (BOD).
• Unique device identification serial number.
• Single power supply (1.8 V to 3.6 V).
• Operating temperature range from -40 ℃ to +105 ℃.
• Available in TSSOP20 and HVQFN33 (5x5) packages.