Alliance Memory AS7C31026B-20TINTR
| Producent | |
| Nr części prod. | AS7C31026B-20TINTR |
| Nr LCSC | C6465861 |
| Opak. | TSOP-442 |
| Numer Klienta | |
| Klucz. cechy | 1Mbit Parallel Port (Parallel) TSOP-442 Memory RoHS |
| Karta Katalogowa | Alliance Memory AS7C31026B-20TINTR |
| Części alternatywne | 5 |
Specyfikacje Produktu
| Typ | Opis | |
|---|---|---|
| Kategoria | Integrated Circuits (ICs)/Memory/Memory | |
| Producent | Alliance Memory | |
| Opak. | TSOP-442 | |
| Operating Temperature | -40℃~+85℃ | |
| Features | Auto power-down function | |
| Memory Size | 1Mbit | |
| Voltage - Supply | 3V~3.6V;65mA | |
| Access Time | 20ns | |
| Standby Supply Current | 5mA | |
| Interface | Parallel Port (Parallel) |
| Typ | Opis | |
|---|---|---|
| Kategoria | Integrated Circuits (ICs)/Memory/Memory | |
| Producent | Alliance Memory | |
| Opak. | TSOP-442 | |
| Operating Temperature | -40℃~+85℃ | |
| Features | Auto power-down function |
| Typ | Opis | |
|---|---|---|
| Memory Size | 1Mbit | |
| Voltage - Supply | 3V~3.6V;65mA | |
| Access Time | 20ns | |
| Standby Supply Current | 5mA | |
| Interface | Parallel Port (Parallel) |
Opis
The AS7C31026B is a high-performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) device organized as 65,536 words x 16 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired. Equal address access and cycle times (tAA, tRC, tWC) of 10/12/15/20 ns with output enable access times (tOE) of 5, 6, 7, 8 ns are ideal for high-performance applications. When CE is high, the device enters standby mode. A write cycle is accomplished by asserting write enable (WE) and chip enable (CE). Data on the input pins I/O0 through I/O15 is written on the rising edge of (WE) (write cycle 1) or (CE) (write cycle 2). To avoid bus contention, external devices should drive I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE). A read cycle is accomplished by asserting output enable (OE) and chip enable (CE) with write enable (WE) high. The chips drive I/O pins with the data word referenced by the input address. When either chip enable or output enable is inactive or write enable is active, output drivers stay in high-impedance mode. The device provides multiple center power and ground pins, and separate byte enable controls, allowing individual bytes to be written and read. LB controls the lower bits, I/O0 through I/O7, and (UB) controls the higher bits, I/O8 through I/O15. All chip inputs and outputs are TTL-compatible, and operation is from a single 3.3 V supply. The device is packaged in common industry standard packages.
Funkcje
- Industrial and Commercial versions
- Organization: 65,536 words x 16 bits
- Center power and ground pins for low noise
- High speed - 10/12/15/20 ns address access time - 5, 6, 7, 8 ns output enable access time
- Low power consumption: ACTIVE - 288 mW / max @ 10 ns
- Low power consumption: STANDBY - 18 mW / max CMOS I/O
- Easy memory expansion with CE, OE inputs
- TTL-compatible, three-state I/O
- JEDEC standard packaging - 44-pin 400 mil SOJ - 44-pin TSOP 2
- ESD protection ≥2000 volts
- Latch-up current ≥200 mA
| Szt. | Cena jedn.(Tylko do wglądu) | Suma całkowita |
|---|---|---|
| 1+ | $ 8.2429 | $ 8.24 |
| 200+ | $ 3.2902 | $ 658.04 |
| 500+ | $ 3.1796 | $ 1589.80 |
| 1,000+ | $ 3.125 | $ 3125.00 |
Standardowa Obudowa1000/Full Reel | ||
Specyfikacje Produktu
| Typ | Opis | |
|---|---|---|
| Kategoria | Integrated Circuits (ICs)/Memory/Memory | |
| Producent | Alliance Memory | |
| Opak. | TSOP-442 | |
| Operating Temperature | -40℃~+85℃ | |
| Features | Auto power-down function | |
| Memory Size | 1Mbit | |
| Voltage - Supply | 3V~3.6V;65mA | |
| Access Time | 20ns | |
| Standby Supply Current | 5mA | |
| Interface | Parallel Port (Parallel) |
| Typ | Opis | |
|---|---|---|
| Kategoria | Integrated Circuits (ICs)/Memory/Memory | |
| Producent | Alliance Memory | |
| Opak. | TSOP-442 | |
| Operating Temperature | -40℃~+85℃ | |
| Features | Auto power-down function |
| Typ | Opis | |
|---|---|---|
| Memory Size | 1Mbit | |
| Voltage - Supply | 3V~3.6V;65mA | |
| Access Time | 20ns | |
| Standby Supply Current | 5mA | |
| Interface | Parallel Port (Parallel) |
Opis
The AS7C31026B is a high-performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) device organized as 65,536 words x 16 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired. Equal address access and cycle times (tAA, tRC, tWC) of 10/12/15/20 ns with output enable access times (tOE) of 5, 6, 7, 8 ns are ideal for high-performance applications. When CE is high, the device enters standby mode. A write cycle is accomplished by asserting write enable (WE) and chip enable (CE). Data on the input pins I/O0 through I/O15 is written on the rising edge of (WE) (write cycle 1) or (CE) (write cycle 2). To avoid bus contention, external devices should drive I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE). A read cycle is accomplished by asserting output enable (OE) and chip enable (CE) with write enable (WE) high. The chips drive I/O pins with the data word referenced by the input address. When either chip enable or output enable is inactive or write enable is active, output drivers stay in high-impedance mode. The device provides multiple center power and ground pins, and separate byte enable controls, allowing individual bytes to be written and read. LB controls the lower bits, I/O0 through I/O7, and (UB) controls the higher bits, I/O8 through I/O15. All chip inputs and outputs are TTL-compatible, and operation is from a single 3.3 V supply. The device is packaged in common industry standard packages.
Funkcje
- Industrial and Commercial versions
- Organization: 65,536 words x 16 bits
- Center power and ground pins for low noise
- High speed - 10/12/15/20 ns address access time - 5, 6, 7, 8 ns output enable access time
- Low power consumption: ACTIVE - 288 mW / max @ 10 ns
- Low power consumption: STANDBY - 18 mW / max CMOS I/O
- Easy memory expansion with CE, OE inputs
- TTL-compatible, three-state I/O
- JEDEC standard packaging - 44-pin 400 mil SOJ - 44-pin TSOP 2
- ESD protection ≥2000 volts
- Latch-up current ≥200 mA
Zgodność & Kody Eksportowe
| Typ | Szczegóły |
|---|---|
| RoHS | ROHS Compliant |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Typ | Szczegóły |
|---|---|
| RoHS | ROHS Compliant |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Typ | Szczegóły |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
Części alternatywne
| MPN | Producent | Typ alternatywny | Opakowanie | Dostępność | Cena jednostkowa | ||
|---|---|---|---|---|---|---|---|
| AS7C31026B-20TIN | Alliance Memory | Podobne | TSOP-442 | 0 | $ 8.0417 | ||
| AS7C31026B-15TIN | Alliance Memory | Podobne | TSOP-442 | 0 | $ 7.0356 | ||
| AS7C31026B-15TINTR | Alliance Memory | Podobne | TSOP-442 | 0 | $ 7.2376 | ||
| AS7C31026B-12TINTR | Alliance Memory | Podobne | TSOP-442 | 0 | $ 7.2371 | ||
| AS7C31026B-12TIN | Alliance Memory | Podobne | TSOP-442 | 0 | $ 7.7104 |

