MXIC MX25R6435FBDIL0TR

MX25R6435F is a 64Mb ultra-low-power CMOS MXSMIO® (Serial Multi I/O) flash memory with SPI, supporting Mode 0 and Mode 3. The memory array is configurable as 67,108,864×1-bit, 33,554,432×2-bit (Dual I/O mode), or 16,777,216×4-bit (Quad I/O mode). The device contains multiple uniform sectors (4KB each) and blocks (32KB/64KB each), supporting independent erase of any block. It operates from a single supply with a working voltage range of 1.65V~3.6V for read, erase, and program operations. The device features latch-up protection, capable of withstanding 100 mA current in the range of -1V to Vcc+1V.

• Ultra-low power mode and high-performance mode
• Wide supply voltage range for read, erase, and program operations: 1.65V~3.6V
• Supports ID and secure OTP
• Supports single I/O, dual I/O, and quad I/O multi-I/O
• Supports program suspend/resume and erase suspend/resume
• Supports SPI mode 0 and mode 3
• Memory organization: 67,108,864×1 bit, or 33,554,432×2 bit, or 16,777,216×4 bit
• Uniform sectors (4K bytes each) and blocks (32K/64K bytes each), any block independently erasable
• Single supply operation
• Latch-up protection: up to 100 mA within -1V to Vcc+1V range
• High performance: fast read (1 I/O: 80MHz, 8 dummy cycles; 2 I/O: 80MHz, 4 dummy cycles, equivalent to 160MHz; 4 I/O: 80MHz, 2+4 dummy cycles, equivalent to 320MHz), fast program and erase times
• Supports 8/16/32/64-byte wrap-around burst read mode
• Supports performance enhanced mode - XIP (Execute In Place)
• Ultra-low power consumption
• Minimum 100,000 erase/program cycles, 20-year data retention
• Software feature: 1-byte command code input data format
• Advanced security feature: block lock protection (BP0-BP3 status bits define software-protected area size, preventing program and erase instructions)
• Additional 8K-bit secure OTP with identifier, factory-lockable for identification and customer-lockable
• Auto-erase and auto-program algorithm: automatically erases and verifies data in selected sector or block; automatically programs and verifies data in selected page via internal algorithm that auto-times program pulse width (any page to be programmed must first be in erased state)
• Status register function
• Command reset
• Program/erase suspend and program/erase resume
• Electronic identification: JEDEC-compliant 1-byte manufacturer ID and 2-byte device ID; RES command for reading 1-byte device ID; REMS command for reading 1-byte manufacturer ID and 1-byte device ID
• Supports Serial Flash Discoverable Parameters (SFDP) mode
• Supports ID (contact local Macronix sales for details)
• Hardware features: serial clock input (SCLK); serial data input or serial data input/output for 2×I/O and 4×I/O read modes (SI/SIO0); serial data output or serial data input/output for 2×I/O and 4×I/O read modes (SO/SIO1); hardware write protection or serial data input/output for 4×I/O read mode (WP#/SIO2); hardware reset pin or serial input/output for 4×I/O read mode, or HOLD function (to pause the device without deselecting it), or serial input/output for 4×I/O read mode (RESET#/SIO3* or HOLD#/SIO3*, depending on model option)
• Packages: 8-pin SOP (200mil), 8-pad WSON (6×5mm), 8-pad USON (4×4mm), 8-pad USON (4×3mm), 22-ball WLCSP (3-2-3 ball array)
• All devices are RoHS compliant and halogen-free