RENESAS 71V416L15Y
| Hersteller | |
| Herst.-Teilenr. | 71V416L15Y |
| LCSC-Nr. | C5913675 |
| Verp. | SOJ-44 |
| Kundennummer | |
| Hauptmerkm. | 4Mbit SOJ-44 Memory |
| Datenblatt | RENESAS 71V416L15Y |
Produktspezifikationen
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Memory/Memory | |
| Hersteller | RENESAS | |
| Verp. | SOJ-44 | |
| Operating Temperature | - | |
| Features | Auto power-down function | |
| Memory Size | 4Mbit | |
| Voltage - Supply | 160mA;3V~3.6V | |
| Access Time | 15ns | |
| Standby Supply Current | 10mA | |
| Interface | - |
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Memory/Memory | |
| Hersteller | RENESAS | |
| Verp. | SOJ-44 | |
| Operating Temperature | - | |
| Features | Auto power-down function |
| Typ | Beschreibung | |
|---|---|---|
| Memory Size | 4Mbit | |
| Voltage - Supply | 160mA;3V~3.6V | |
| Access Time | 15ns | |
| Standby Supply Current | 10mA | |
| Interface | - |
Beschreibung
The IDT71V416 is a 4,194,304-bit high-speed SRAM organized as 256K×16. It is fabricated using IDT's high-performance, high-reliability CMOS technology. This advanced technology, combined with innovative circuit design techniques, provides a cost-effective solution for high-speed memory applications. The IDT71V416 features an output enable pin, with operating speeds as fast as 5ns and address access times as fast as 10ns. All bidirectional inputs and outputs of the IDT71V416 are LVTTL-compatible and powered by a single 3.3V supply. Fully static asynchronous circuitry eliminates the need for clocks or refresh operations. The IDT71V416 is available in a 44-pin, 400-mil plastic SOJ package, a 44-pin, 400-mil TSOP Type II package, and a 48-ball BGA, 9mm×9mm package.
Merkmale
- 256K×16 advanced high-speed CMOS SRAM
- JEDEC center power/ground pin layout for reduced noise
- Equal access and cycle times — commercial and industrial: 10/12/15ns
- Single chip select pin plus output enable pin
- Bidirectional data I/O directly compatible with LVTTL
- Low-power operation via chip select deselect
- Upper and lower byte enable pins
- Single 3.3V power supply
- Available in 44-pin, 400-mil plastic SOJ package, 44-pin, 400-mil TSOP Type II package, and 48-ball BGA, 9mm×9mm package
| Stk. | E-Preis(Nur als Referenz) | Gesamtbetrag |
|---|---|---|
| 1+ | $ 2.6473 | $ 2.65 |
| 200+ | $ 1.0562 | $ 211.24 |
| 500+ | $ 1.0214 | $ 510.70 |
| 1,000+ | $ 1.0047 | $ 1004.70 |
Standardgehäuse500/Full Reel | ||
Produktspezifikationen
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Memory/Memory | |
| Hersteller | RENESAS | |
| Verp. | SOJ-44 | |
| Operating Temperature | - | |
| Features | Auto power-down function | |
| Memory Size | 4Mbit | |
| Voltage - Supply | 160mA;3V~3.6V | |
| Access Time | 15ns | |
| Standby Supply Current | 10mA | |
| Interface | - |
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Memory/Memory | |
| Hersteller | RENESAS | |
| Verp. | SOJ-44 | |
| Operating Temperature | - | |
| Features | Auto power-down function |
| Typ | Beschreibung | |
|---|---|---|
| Memory Size | 4Mbit | |
| Voltage - Supply | 160mA;3V~3.6V | |
| Access Time | 15ns | |
| Standby Supply Current | 10mA | |
| Interface | - |
Beschreibung
The IDT71V416 is a 4,194,304-bit high-speed SRAM organized as 256K×16. It is fabricated using IDT's high-performance, high-reliability CMOS technology. This advanced technology, combined with innovative circuit design techniques, provides a cost-effective solution for high-speed memory applications. The IDT71V416 features an output enable pin, with operating speeds as fast as 5ns and address access times as fast as 10ns. All bidirectional inputs and outputs of the IDT71V416 are LVTTL-compatible and powered by a single 3.3V supply. Fully static asynchronous circuitry eliminates the need for clocks or refresh operations. The IDT71V416 is available in a 44-pin, 400-mil plastic SOJ package, a 44-pin, 400-mil TSOP Type II package, and a 48-ball BGA, 9mm×9mm package.
Merkmale
- 256K×16 advanced high-speed CMOS SRAM
- JEDEC center power/ground pin layout for reduced noise
- Equal access and cycle times — commercial and industrial: 10/12/15ns
- Single chip select pin plus output enable pin
- Bidirectional data I/O directly compatible with LVTTL
- Low-power operation via chip select deselect
- Upper and lower byte enable pins
- Single 3.3V power supply
- Available in 44-pin, 400-mil plastic SOJ package, 44-pin, 400-mil TSOP Type II package, and 48-ball BGA, 9mm×9mm package
C5913675 EasyEDA-Bibliothek
Compliance & Exportcodes
| Typ | Details |
|---|---|
| ECCN | 3A991B2A |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Typ | Details |
|---|---|
| ECCN | 3A991B2A |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Typ | Details |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |

