Infineon CY9AF312NABGL-GK9E1

The MB9A310K Series are a highly integrated 32-bit microcontrollers dedicated for embedded controllers with high-performance and low cost. These series are based on the ARM Cortex-M3 Processor with on-chip Flash memory and SRAM, and has peripheral functions such as Motor Control Timers, ADCs and Communication Interfaces (USB, UART, CSIO, I²C, LIN).

• Processor version: r2p1
• Up to 40MHz Frequency Operation
• Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48 peripheral interrupts and 16 priority levels
• This Series are based on two independent on-chip Flash memories.
• MainFlash: Up to 128Kbyte, Read cycle: 0 wait-cycle, Security function for code protection
• WorkFlash: 32Kbyte, Read cycle: 0 wait-cycle, Security function is shared with code protection
• This Series contain a total of up to 16Kbyte on-chip SRAM. This is composed of two independent SRAM (SRAM0, SRAM1). SRAM0 is connected to I-code bus and D-code bus of Cortex-M3 core. SRAM1 is connected to System bus. SRAM0: 8 Kbyte SRAM1: 8 Kbyte
• USB interface is composed of Device and Host. PLL for USB is built-in, USB clock can be generated by multiplication of Main clock.
• USB2.0 Full-Speed supported, Max 6 EndPoint supported, EndPoint 0 is control transfer, EndPoint 1, 2 can be selected Bulk-transfer, Interrupttransfer or Isochronous-transfer, EndPoint 3 to 5 can be selected Bulk-transfer or Interrupttransfer, EndPoint 1 to 5 is comprised Double Buffer, The size of each EndPoint is as follows. EndPoint 0, 2 to 5: 64 bytes, EndPoint 1: 256 bytes
• USB2.0 Full/Low-speed supported, Bulk-transfer, interrupt-transfer and Isochronous-transfer support, USB Device connected/dis-connected automatically detect, IN/OUT token handshake packet automatically, Max 256-byte packet-length supported, Wake-up function supported
• 2 channels with 16-steps × 9 -bits FIFO (ch.0, ch.1), 2 channels without FIFO (ch.3, ch.5), Operation mode is selectable from the followings for each channel. (In ch.5, only UART and LIN are available.) UART, CSIO, LIN, I²C
• Full-duplex double buffer, Selection with or without parity supported, Built-in dedicated baud rate generator, External clock available as a serial clock, Hardware Flow control: Automatically control the transmission by CTS/RTS (only ch.4), Various error detect functions available (parity errors, framing errors, and overrun errors)
• Full-duplex double buffer, Built-in dedicated baud rate generator, Overrun error detect function available
• LIN protocol Rev.2.1 supported, Full-duplex double buffer, Master/Slave mode supported, LIN break field generate (can be changed 13 to 16-bit length), LIN break delimiter generate (can be changed 1 to 4-bit length), Various error detect functions available (parity errors, framing errors, and overrun errors)
• Standard mode (Max 100 kbps) / Fast-mode (Max 400 kbps) supported
• DMA Controller has an independent bus for CPU, so CPU and DMA Controller can process simultaneously.
• 8 independently configured and operated channels
• Transfer can be started by software or request from the builtin peripherals
• Transfer address area: 32-bit (4 Gbyte)
• Transfer mode: Block transfer/Burst transfer/Demand transfer
• Transfer data type: byte/half-word/word
• Transfer block count: 1 to 16
• Number of transfers: 1 to 65536
• Successive Approximation Register type
• Built-in 2 unit
• Conversion time: 1.0 μs@5 V
• Priority conversion available (priority at 2 levels)
• Scanning conversion mode
• Built-in FIFO for conversion data storage (for SCAN conversion: 16 steps, for Priority conversion: 4 steps)
• Operation mode is selectable from the followings for each channel. 16-bit PWM timer, 16-bit PPG timer, 16-/32-bit reload timer, 16-/32-bit PWC timer
• This series can use its pins as General Purpose I/O ports when they are not used for external bus or peripherals. Moreover, the port relocate function is built in. It can set which I/O port the peripheral function can be allocated.
• Capable of pull-up control per pin
• Capable of reading pin level directly
• Built-in the port relocate function
• Up 36 fast General Purpose I/O Ports
• Some pin is 5V tolerant