WCH CH568L
| Hersteller | WCHAsian Brands |
| Herst.-Teilenr. | CH568L |
| LCSC-Nr. | C963142 |
| Verp. | LQFP-48(7x7) |
| Kundennummer | |
| Hauptmerkm. | 32-bit RISC microcontroller |
| Datenblatt | WCH CH568L |
Produktspezifikationen
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Hersteller | WCH | |
| Verp. | LQFP-48(7x7) | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 3V~3.6V | |
| Program Memory Type | FLASH | |
| Program Storage Size | 192KB | |
| CPU Core | RISC | |
| Core Size | 32 Bit | |
| CPU Maximum Speed | 120MHz | |
| Oscillator Type | Built-in+External |
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Hersteller | WCH | |
| Verp. | LQFP-48(7x7) | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 3V~3.6V | |
| Program Memory Type | FLASH |
| Typ | Beschreibung | |
|---|---|---|
| Program Storage Size | 192KB | |
| CPU Core | RISC | |
| Core Size | 32 Bit | |
| CPU Maximum Speed | 120MHz | |
| Oscillator Type | Built-in+External |
Beschreibung
CH568 is a high- performance 32- bit RISC reduced instruction set microcontroller, built- in 192KB FLASH flash memory, 32KB SRAM and 32KB DataFlash. On- chip integrated high- speed USB2.0 master/slave controller, 4 groups of SD controllers, SATA controllers, encryption algorithm modules, 4 groups of UARTs, 7 groups of PWMs, 3 groups of timers and other rich peripheral resources, which can be widely used for various embedded applications.
Merkmale
- Core:
- 32- bit RISC reduced instruction set core
- 120MHz maximum frequency
- Memory:
- 192KB bytes program memory, support write protection
- 32KB bytes SRAM
- 32KB bytes DataFlash
- USB2.0 high- speed receiver- transmitter (built- in PHY):
- High- speed Host / Device mode
- Support control/bulk/interrupt/synchronous transmission
- Support double buffering PINT- PONG
- Support DMA
- 4 groups of independent SD controllers:
- Support single- wire, 4- wire, 8- wire communication mode
- Support SD/TF card, SDIO card and eMMC card, etc.
- Built- in FIFO
- Support AES and SM4 Algorithms
- Provide 8 encryption and decryption modes
- Support DMA
- SATA controller (built- in PHY):
- Support 1.5G/3G mode
- Support power management
- Support automatic data flow control
- Support DMA
- Timer:
- 3 sets of 26- bit timers
- Support signal width sample/edge capture, PWM adjustable output, count function
- TMR1 and TMR2 support DMA
- PWMX:
- Expand 4 sets of PWM output
- Adjustable duty cycle
- Universal asynchronous receiver/transmitter (UART):
- 4 groups of independent UARTs, compatible with 16C550
- The highest baud rate is 6Mbps
- Built- in FIFO, multiple trigger levels
- SPI:
- 2 sets of SPIs: One supports Master and Slave mode, the other supports only Master mode
- Built- in FIFO
- SPI0 supports DMA
- LED screen interface:
- Support 1/2/4 channel data line
- Built- in FIFO, support double buffering
- Support DMA
- Low power:
- Sleep mode
- Support some GPIO, USB or SATA signal wake- up
- General- purpose I/O port:
- 26 GPIOs
- 8 pins can be configured level or edge interrupt
- Some pins have multiplexing and mapping functions
- ID Number of chip:
- Unique 64bit ID identification number
- Power:
- 3.0~3.6V(3.3V±10%)
- Package: LQFP48
Anwendungen
- Security storage
- Home security
- USB- related applications
- Monitoring
- Alarm systems
- Printers
- Scanners and other application control
| Stk. | E-Preis | Gesamtbetrag |
|---|---|---|
| 1+ | $ 3.3852 | $ 3.39 |
| 10+ | $ 3.2144 | $ 32.14 |
| 30+ | $ 3.1122 | $ 93.37 |
| 250+ | $ 3.01 | $ 752.50 |
| 500+ | $ 2.9621 | $ 1481.05 |
| 1,000+ | $ 2.9397 | $ 2939.70 |
Standardgehäuse250/Full Tray | ||
Produktspezifikationen
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Hersteller | WCH | |
| Verp. | LQFP-48(7x7) | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 3V~3.6V | |
| Program Memory Type | FLASH | |
| Program Storage Size | 192KB | |
| CPU Core | RISC | |
| Core Size | 32 Bit | |
| CPU Maximum Speed | 120MHz | |
| Oscillator Type | Built-in+External |
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Hersteller | WCH | |
| Verp. | LQFP-48(7x7) | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 3V~3.6V | |
| Program Memory Type | FLASH |
| Typ | Beschreibung | |
|---|---|---|
| Program Storage Size | 192KB | |
| CPU Core | RISC | |
| Core Size | 32 Bit | |
| CPU Maximum Speed | 120MHz | |
| Oscillator Type | Built-in+External |
Beschreibung
CH568 is a high- performance 32- bit RISC reduced instruction set microcontroller, built- in 192KB FLASH flash memory, 32KB SRAM and 32KB DataFlash. On- chip integrated high- speed USB2.0 master/slave controller, 4 groups of SD controllers, SATA controllers, encryption algorithm modules, 4 groups of UARTs, 7 groups of PWMs, 3 groups of timers and other rich peripheral resources, which can be widely used for various embedded applications.
Merkmale
- Core:
- 32- bit RISC reduced instruction set core
- 120MHz maximum frequency
- Memory:
- 192KB bytes program memory, support write protection
- 32KB bytes SRAM
- 32KB bytes DataFlash
- USB2.0 high- speed receiver- transmitter (built- in PHY):
- High- speed Host / Device mode
- Support control/bulk/interrupt/synchronous transmission
- Support double buffering PINT- PONG
- Support DMA
- 4 groups of independent SD controllers:
- Support single- wire, 4- wire, 8- wire communication mode
- Support SD/TF card, SDIO card and eMMC card, etc.
- Built- in FIFO
- Support AES and SM4 Algorithms
- Provide 8 encryption and decryption modes
- Support DMA
- SATA controller (built- in PHY):
- Support 1.5G/3G mode
- Support power management
- Support automatic data flow control
- Support DMA
- Timer:
- 3 sets of 26- bit timers
- Support signal width sample/edge capture, PWM adjustable output, count function
- TMR1 and TMR2 support DMA
- PWMX:
- Expand 4 sets of PWM output
- Adjustable duty cycle
- Universal asynchronous receiver/transmitter (UART):
- 4 groups of independent UARTs, compatible with 16C550
- The highest baud rate is 6Mbps
- Built- in FIFO, multiple trigger levels
- SPI:
- 2 sets of SPIs: One supports Master and Slave mode, the other supports only Master mode
- Built- in FIFO
- SPI0 supports DMA
- LED screen interface:
- Support 1/2/4 channel data line
- Built- in FIFO, support double buffering
- Support DMA
- Low power:
- Sleep mode
- Support some GPIO, USB or SATA signal wake- up
- General- purpose I/O port:
- 26 GPIOs
- 8 pins can be configured level or edge interrupt
- Some pins have multiplexing and mapping functions
- ID Number of chip:
- Unique 64bit ID identification number
- Power:
- 3.0~3.6V(3.3V±10%)
- Package: LQFP48
Anwendungen
- Security storage
- Home security
- USB- related applications
- Monitoring
- Alarm systems
- Printers
- Scanners and other application control
C963142 EasyEDA-Bibliothek
Compliance & Exportcodes
| Typ | Details |
|---|---|
| ECCN | |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Typ | Details |
|---|---|
| ECCN | |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Typ | Details |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |



