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EDA 모델EasyEDA
MICROCHIP DSPIC33CK32MC103-I/M5
| 제조업체 | |
| 제조사 품번 | DSPIC33CK32MC103-I/M5 |
| LCSC 번호 | C5226467 |
| 포장 | UQFN-36(5x5) |
| 고객 번호 | |
| 주요 제원 | UQFN-36(5x5) Microcontrollers RoHS |
| 데이터시트 | MICROCHIP DSPIC33CK32MC103-I/M5 |
| RoHS 준수 | 2개 문서 이용 가능 |
제품 사양
전체
| 타입 | 설명 | |
|---|---|---|
| 카테고리 | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| 제조업체 | MICROCHIP | |
| 포장 | UQFN-36(5x5) | |
| Operating Temperature | -40℃~+85℃ |
| 타입 | 설명 | |
|---|---|---|
| 포장 | UQFN-36(5x5) | |
| Operating Temperature | -40℃~+85℃ |
도움말 및 피드백유사 제품 보기 (0) >
주요 특징
AI 번역
- 16-Bit Wide Data Path
- Code Efficient (C and Assembly) Architecture
- 40-Bit Wide Accumulators
- Single-Cycle (MAC/MPY) with Dual Data Fetch
- Single-Cycle, Mixed-Sign Multiply: 32-bit multiply support
- Fast Six-Cycle Divide
- Zero Overhead Looping
- Four PWM Pairs
- Up to 2 ns PWM Resolution
- Dead Time for Rising and Falling Edges
- Dead-Time Compensation
- Clock Chopping for High-Frequency Operation
- PWM Support for: DC/DC, AC/DC, inverters, PFC, lighting; BLDC, PMSM, ACIM, SRM motors
- Fault and Current Limit Inputs
- Flexible Trigger Configuration for ADC Triggering
- Up to 15 A/D inputs
- 12-Bit Resolution
- One Shared SAR ADC Core
- Up to 3.5 Msps Conversion Rate per Core
- Dedicated Result Buffer for Each Analog Channel
- Flexible and Independent ADC Trigger Sources
- Four Digital Comparators
- Four Oversampling Filters
- Small Pin Count Packages Ranging from 28 to 48 Pins, Including UQFN as Small as 4x4 mm
- High-Current I/O Sink/Source
- Edge or Level Change Notification Interrupt on I/O Pins
- Peripheral Pin Select (PPS) Remappable Pins
- Up to 64 Kbytes Flash Memory: 10,000 erase/write cycle endurance; 20 years minimum data retention; Self-programmable under software control; Programmable code protection; Error Code Correction (ECC); Flash OTP by ICSP Write Inhibit
- Eight Kbytes SRAM Memory: SRAM Memory Built-In Self-Test (MBIST)
- Multiple Interrupt Vectors with Individually Programmable Priority
- Four Sets of Interrupt Context Saving Registers which Include Accumulator and STATUS for Fast Reserved Interrupt Handling
- Four External Interrupt Pins
- Watchdog Timer (WDT)
- Windowed Deadman Timer (DMT)
- Fail-Safe Clock Monitor (FSCM) with Dedicated Oscillator
- Selectable Oscillator Options Including: High-precision, 8 MHz internal Fast RC (FRC) Oscillator; Primary high-speed, crystal/resonator oscillator or external clock; Primary PLL, which can be clocked from FRC or crystal oscillator
- Low-Power Management modes (Sleep and Idle)
- Power-on Reset and Brown-out Reset
- On-Board Capacitorless Regulator
- 384 Bytes of One-Time-Programmable (OTP) Memory
- Two Four-Wire SPI modules (up to 50 Mbps): 16-byte FIFO; Variable width; I²S mode
- One I²C Host and Client w/Address Masking and IPMI Support
- Three Protocol UARTs with Automated Handling Support for: LIN 2.2; DMX; Smart card (ISO 7816)
- One SENT module
- Timers/Counters: One dedicated 16-bit timer/counter
- Four Single Output Capture/Compare/PWM/Timer (SCCP) modules: Flexible configuration as PWM, input capture, output compare or timers; Two 16-bit timers or one 32-bit timer in each module; PWM resolution down to 2.5 ns; Single PWM output
- One Quadrature Encoder Interface (QEI): Four inputs: Phase A, Phase B, Home, Index; One 32-bit timer/counter (in QEI module, available if encoder is not used)
- Reference Clock Output (REFCLKO)
- Four Configurable Logic Cells (CLC) with Internal Connections to Select Peripherals and PPS
- Four-Channel Hardware DMA
- 32-Bit CRC Calculation module
- Peripheral Trigger Generator (PTG): 16 possible trigger sources to other peripheral modules; CPU-independent state machine-based instruction sequencer; Two 16-bit general purpose timers
- One Fast Analog Comparator with Input Multiplexing
- Three Operational Amplifiers
- One 12-Bit PDM DAC with Slope Compensation
- One Output DAC Buffer
- Three Programming and Debugging Interfaces: Two-wire ICSP interface with non-intrusive access and real-time data exchange with application
- Three Complex, Five Simple Breakpoints
- IEEE Standard 1149.2 Compatible (JTAG) Boundary Scan
- AEC-Q100 REV G (Grade 1: -40°C to +125°C)
- AEC-Q100 REV G (Grade 0: -40°C to +150°C)
- Backup Fast RC Oscillator (BFRC)
- Brown-out Reset (BOR)
- Capless Internal Voltage Regulator
- Clock Monitor System with Backup Oscillator
- CodeGuard Security
- Cyclic Redundancy Check (CRC)
- Dual Watchdog Timer (WDT)
- Fail-Safe Clock Monitoring (FSCM)
- Flash Error Correcting Code (ECC)
- Flash OTP by ICSP Write Inhibit
- RAM Memory Built-In Self-Test (MBIST)
- Two-Speed Start-up
- Virtual Pins for Redundancy and Monitoring
- Windowed Deadman Timer (DMT)
- Class B Safety Library – IEC 60730
- For ASIL B and Beyond Applications – ISO 26262
- FMEDA Computation Spreadsheet (evaluation of Random Hardware Failures Metric)
- Functional Safety Manual
- Functional Safety Diagnostics Suite
모든 주문 보장
100% 정품 · 30일 반품 또는 교환
품절
재입고 알림
최소값: 1배수: 1판매 단위: Piece
BOM 목록에 추가
| 수량 | 단가(참고용) | 총액 |
|---|---|---|
| 1+ | $ 3.6771 | $ 3.68 |
| 219+ | $ 1.4238 | $ 311.81 |
| 511+ | $ 1.3732 | $ 701.71 |
| 1,022+ | $ 1.3495 | $ 1379.19 |
표준 패키지73/Full Tube | ||
수량이 많을수록 더 좋은 가격?
$
제품 사양
전체
| 타입 | 설명 | |
|---|---|---|
| 카테고리 | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| 제조업체 | MICROCHIP | |
| 포장 | UQFN-36(5x5) | |
| Operating Temperature | -40℃~+85℃ |
| 타입 | 설명 | |
|---|---|---|
| 포장 | UQFN-36(5x5) | |
| Operating Temperature | -40℃~+85℃ |
도움말 및 피드백유사 제품 보기 (0) >
주요 특징
AI 번역
- 16-Bit Wide Data Path
- Code Efficient (C and Assembly) Architecture
- 40-Bit Wide Accumulators
- Single-Cycle (MAC/MPY) with Dual Data Fetch
- Single-Cycle, Mixed-Sign Multiply: 32-bit multiply support
- Fast Six-Cycle Divide
- Zero Overhead Looping
- Four PWM Pairs
- Up to 2 ns PWM Resolution
- Dead Time for Rising and Falling Edges
- Dead-Time Compensation
- Clock Chopping for High-Frequency Operation
- PWM Support for: DC/DC, AC/DC, inverters, PFC, lighting; BLDC, PMSM, ACIM, SRM motors
- Fault and Current Limit Inputs
- Flexible Trigger Configuration for ADC Triggering
- Up to 15 A/D inputs
- 12-Bit Resolution
- One Shared SAR ADC Core
- Up to 3.5 Msps Conversion Rate per Core
- Dedicated Result Buffer for Each Analog Channel
- Flexible and Independent ADC Trigger Sources
- Four Digital Comparators
- Four Oversampling Filters
- Small Pin Count Packages Ranging from 28 to 48 Pins, Including UQFN as Small as 4x4 mm
- High-Current I/O Sink/Source
- Edge or Level Change Notification Interrupt on I/O Pins
- Peripheral Pin Select (PPS) Remappable Pins
- Up to 64 Kbytes Flash Memory: 10,000 erase/write cycle endurance; 20 years minimum data retention; Self-programmable under software control; Programmable code protection; Error Code Correction (ECC); Flash OTP by ICSP Write Inhibit
- Eight Kbytes SRAM Memory: SRAM Memory Built-In Self-Test (MBIST)
- Multiple Interrupt Vectors with Individually Programmable Priority
- Four Sets of Interrupt Context Saving Registers which Include Accumulator and STATUS for Fast Reserved Interrupt Handling
- Four External Interrupt Pins
- Watchdog Timer (WDT)
- Windowed Deadman Timer (DMT)
- Fail-Safe Clock Monitor (FSCM) with Dedicated Oscillator
- Selectable Oscillator Options Including: High-precision, 8 MHz internal Fast RC (FRC) Oscillator; Primary high-speed, crystal/resonator oscillator or external clock; Primary PLL, which can be clocked from FRC or crystal oscillator
- Low-Power Management modes (Sleep and Idle)
- Power-on Reset and Brown-out Reset
- On-Board Capacitorless Regulator
- 384 Bytes of One-Time-Programmable (OTP) Memory
- Two Four-Wire SPI modules (up to 50 Mbps): 16-byte FIFO; Variable width; I²S mode
- One I²C Host and Client w/Address Masking and IPMI Support
- Three Protocol UARTs with Automated Handling Support for: LIN 2.2; DMX; Smart card (ISO 7816)
- One SENT module
- Timers/Counters: One dedicated 16-bit timer/counter
- Four Single Output Capture/Compare/PWM/Timer (SCCP) modules: Flexible configuration as PWM, input capture, output compare or timers; Two 16-bit timers or one 32-bit timer in each module; PWM resolution down to 2.5 ns; Single PWM output
- One Quadrature Encoder Interface (QEI): Four inputs: Phase A, Phase B, Home, Index; One 32-bit timer/counter (in QEI module, available if encoder is not used)
- Reference Clock Output (REFCLKO)
- Four Configurable Logic Cells (CLC) with Internal Connections to Select Peripherals and PPS
- Four-Channel Hardware DMA
- 32-Bit CRC Calculation module
- Peripheral Trigger Generator (PTG): 16 possible trigger sources to other peripheral modules; CPU-independent state machine-based instruction sequencer; Two 16-bit general purpose timers
- One Fast Analog Comparator with Input Multiplexing
- Three Operational Amplifiers
- One 12-Bit PDM DAC with Slope Compensation
- One Output DAC Buffer
- Three Programming and Debugging Interfaces: Two-wire ICSP interface with non-intrusive access and real-time data exchange with application
- Three Complex, Five Simple Breakpoints
- IEEE Standard 1149.2 Compatible (JTAG) Boundary Scan
- AEC-Q100 REV G (Grade 1: -40°C to +125°C)
- AEC-Q100 REV G (Grade 0: -40°C to +150°C)
- Backup Fast RC Oscillator (BFRC)
- Brown-out Reset (BOR)
- Capless Internal Voltage Regulator
- Clock Monitor System with Backup Oscillator
- CodeGuard Security
- Cyclic Redundancy Check (CRC)
- Dual Watchdog Timer (WDT)
- Fail-Safe Clock Monitoring (FSCM)
- Flash Error Correcting Code (ECC)
- Flash OTP by ICSP Write Inhibit
- RAM Memory Built-In Self-Test (MBIST)
- Two-Speed Start-up
- Virtual Pins for Redundancy and Monitoring
- Windowed Deadman Timer (DMT)
- Class B Safety Library – IEC 60730
- For ASIL B and Beyond Applications – ISO 26262
- FMEDA Computation Spreadsheet (evaluation of Random Hardware Failures Metric)
- Functional Safety Manual
- Functional Safety Diagnostics Suite
C5226467 EasyEDA 라이브러리
컴플라이언스 & 수출 코드
| 타입 | 세부사항 |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| 타입 | 세부사항 |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| 타입 | 세부사항 |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS | |