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Infineon/CYPRESS CY8C5467AXI-011

Produttore
Cod. Prod.
CY8C5467AXI-011
Cod. LCSC
C2948573
Imballo
LQFP-100
Numero Cliente
Attr. chiave
LQFP-100 Microcontrollers
Scheda TecnicaInfineon/CYPRESS CY8C5467AXI-011
Garanzia su ogni ordine
100% Autentico · Reso o Sostituzione entro 30 Giorni
Esaurito
Avvisami
Minimo: 1Multiplo: 1Unità di vendita: Piece
Aggiungi alla Lista BOM
QtàPr. unit.(Solo per riferimento)Importo totale
1+$ 1.5739$ 1.57
200+$ 0.6095$ 121.90
500+$ 0.5879$ 293.95
1,000+$ 0.5771$ 577.10
Package Standard90/Full Tray
Prezzo migliore per quantità maggiore?
$

Specifiche del Prodotto

Tutto
TipoDescrizione
CategoriaIntegrated Circuits (ICs)/Embedded/Microcontrollers
ProduttoreInfineon/CYPRESS
ImballoLQFP-100

Descrizione

Traduzione AI

With its unique array of configurable blocks, PSoC 5 is a true system level solution providing MCU, memory, analog, and digital peripheral functions in a single chip. The CY8C54 family offers a modern method of signal acquisition, signal processing, and control with high accuracy, high bandwidth, and high flexibility. Analog capability spans the range from thermocouples (near DC voltages) to ultrasonic signals. The CY8C54 family can handle dozens of data acquisition channels and analog inputs on every GPIO pin. The CY8C54 family is also a high performance configurable digital system with some part numbers including interfaces such as USB and multimaster I²C. In addition to communication interfaces, the CY8C54 family has an easy to configure logic array, flexible routing to all I/O pins, and a high performance 32-bit ARM Cortex-M3 microprocessor core. Designers can easily create system level designs using a rich library of prebuilt components and boolean primitives using PSoC Creator, a hierarchical schematic design entry tool. The CY8C54 family provides unparalleled opportunities for analog and digital bill of materials integration while easily accommodating last minute design changes through simple firmware updates.

Caratteristiche

Traduzione AI
  • 32-bit ARM Cortex-M3 CPU core
  • DC to 67 MHz operation
  • Flash program memory, up to 256 KB, 100,000 write cycles, 20 year retention, and multiple security features
  • Up to 64 KB SRAM memory
  • 128 bytes of cache memory
  • 2 KB EEPROM memory, 1 million cycles, and 20 years retention
  • 24-channel DMA with multilayer AHB bus access
    • Programmable chained descriptors and priorities
    • High bandwidth 32-bit transfer support
  • Low voltage, ultra low power
    • Operating voltage range: 2.7 V to 5.5 V
    • 6 mA at 6 MHz
    • 37 mA at 63 MHz
    • Low-power modes including:
      • 2-μA sleep mode
      • 300-nA hibernate mode with RAM retention
  • Versatile I/O system
    • 46 to 70 I/Os (60 GPIOs, 8 SIOs, 2 USBIOs)
    • Any GPIO to any digital or analog peripheral routability
    • LCD direct drive from any GPIO, up to 46x16 segments
    • CapSense support from any GPIO
    • 1.2 V to 5.5 V I/O interface voltages, up to four domains
    • Maskable, independent IRQ on any pin or port
    • Schmitt-trigger TTL inputs
    • All GPIOs configurable as open drain high/low, pull-up/pull-down, High Z, or strong output
    • 25 mA sink on SIO
  • Digital peripherals
    • 20 to 24 programmable PLD based universal digital blocks (UDB)
    • Full-Speed (FS) USB 2.0 12 Mbps using a 24 MHz external oscillator
    • Four 16-bit configurable timer, counter, and PWM blocks
    • 67 MHz, 24-bit fixed point digital filter block (DFB) to implement FIR and IIR filters
    • Library of standard peripherals
      • 8-, 16-, 24-, and 32-bit timers, counters, and PWMs
      • SPI, UART, I²C
      • Many others available in catalog
    • Library of advanced peripherals
      • Cyclic redundancy check (CRC)
      • Pseudo random sequence (PRS) generator
      • LIN bus 2.0
      • Quadrature decoder
  • Analog peripherals (2.7 V ≤ VDDA ≤ 5.5 V)
    • 1.024 V ±1% internal voltage reference
    • Two SAR ADCs, each 12-bit at 700 ksps
    • Four 8-bit 5.5 Msps IDACs or 1 Msps VDACs
    • Four comparators with 95 ns response time
    • Four uncommitted opamps with 10 mA drive capability
    • Four configurable multifunction analog blocks. Example configurations are PGA, TIA. Mixer and Sample and hold
    • CapSense support
  • Programming, debug, and trace
    • Serial wire debug (SWD) and single-wire viewer (SWV) interfaces
    • Cortex-M3 flash patch and breakpoint (FPB) block
    • Cortex-M3 data watchpoint and trace (DWT) generates data trace information
    • Cortex-M3 Instrumentation Trace Macrocell (ITM) can be used for printf-style debugging
    • DWT and ITM blocks communicate with off-chip debug and trace systems via the SWV interface
    • Bootloader programming supportable through I²C, SPI, UART, USB, and other interfaces
  • Precision, programmable clocking
    • 3 to 48 MHz internal oscillator over full temperature and voltage range
    • 4 to 25 MHz crystal oscillator for crystal PPM accuracy
    • Internal PLL clock generation up to 67 MHz
    • 32.768 kHz watch crystal oscillator
    • Low-power internal oscillator at 1, 33, and 100 kHz
  • Temperature and packaging
    • -40 ℃ to +85 ℃ degrees industrial temperature
    • 8-pin QFN and 100-pin TQFP package options

Applicazioni

Traduzione AI
  • Consumer applications
  • Industrial applications
  • Medical applications