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TI SN74LVC3G04DCUR

Produttore
TI
Cod. Prod.
SN74LVC3G04DCUR
Cod. LCSC
C153799
Imballo
VSSOP-8
Numero Cliente
Attr. chiave
Triple Inverter Gate
Scheda TecnicaTI SN74LVC3G04DCUR
Conformità RoHS2 documenti disponibili
Garanzia su ogni ordine
100% Autentico · Reso o Sostituzione entro 30 Giorni
Disponibile: 3,209
3,209 Pronta consegna
Minimo: 1Multiplo: 1Unità di vendita: Piece
Aggiungi alla Lista BOM
QtàPr. unit.Importo totale
1+$ 0.4597$ 0.46
10+$ 0.3612$ 3.61
30+$ 0.3136$ 9.41
100+$ 0.2693$ 26.93
500+$ 0.2578$ 128.90
1,000+$ 0.2512$ 251.20
Package Standard3000/Full Reel
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Specifiche del Prodotto

Tutto
TipoDescrizione
CategoriaIntegrated Circuits (ICs)/Logic/Gates and Inverters
ProduttoreTI
ImballoVSSOP-8
Input Type-
Input Logic Level - High1.7V;2V
Logic Family74LVC
Input Logic Level - Low700mV;800mV
Operating Temperature-40℃~+125℃
Output Logic Level - High2.4V;3.8V
Quiescent Current(Iq)10uA
Voltage - Supply1.65V~5.5V
Number of Channels-
Current - Output High(IOH)32mA
Propagation Delay4.1ns@3.3V,50pF
Output Logic Level - Low750mV
Current - Output Low(IOL)32mA
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Descrizione

Traduzione AI

This triple inverter is designed for 1.65-V to 5.5–VCC operation. The SN74LVC3G04 device performs the Boolean function Y = A̅. NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Caratteristiche

Traduzione AI
  • Available in the Texas Instruments NanoFree Package
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.1 ns at 3.3 V
  • Low Power Consumption, 10-μA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3V, TA = 25°C
  • Ioff Supports Live Insertion, Partial-Power Down Mode, and Back-Drive Protection
  • Can Be Used as a Down Translator to Translate Inputs From a Max of 5.5 V Down to the VCC Level
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)