RENESAS 8P34S1208NBGI

The 8P34S1208I is a high-performance differential LVDS fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The 8P34S1208I is characterized to operate from a 1.8V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the 8P34S1208I ideal for those clock distribution applications demanding well-defined performance and repeatability. Two selectable differential inputs and eight low skew outputs are available. The integrated bias voltage reference enables easy interfacing of single-ended signals to the device inputs. The device is optimized for low power consumption and low additive phase noise.

• Eight low skew, low additive jitter LVDS output pairs
• Two selectable, differential clock input pairs
• Differential CLK, nCLK pairs can accept the following differential input levels: LVDS, CML
• Maximum input clock frequency: 1.2GHz (maximum)
• LVCMOS/LVTTL interface levels for the control input select pin
• Output skew: 20ps (typical)
• Propagation delay: 315ps (typical)
• Low additive phase jitter, RMS; f_REF = 156.25MHz, V_PP = 1V, 12kHz–20MHz: 41fs (typical)
• Full 1.8V supply voltage
• Lead-free (RoHS 6), 28-Lead VFQFPN packaging
• -40°C to 85°C ambient operating temperature