onsemi TMC2340AH5C1

The TMC2340A performs waveform synthesis, modulation, and demodulation. When presented with a TTL clock signal and user-selected 15-bit amplitude and 32-bit phase increment values, the TMC2340A automatically generates quadrature matched pairs of 16-bit sine and cosine waves in DAC-compatible 16-bit offset binary format. If desired, these waveforms are easily phase or frequency-modulated on-chip, and the amplitude input facilitates gain adjustment or amplitude modulation. Digital output frequencies are restricted only by the Nyquist limit of clock rate/2, with frequency resolution of 0.012 Hz at the guaranteed maximum 50 MHz clockrate. A new data word pair is available at the output every clock cycle. All input and output data ports are registered, with a user-configurable phase accumulator structure and input register clock enables to simplify interfacing. The phase data range over a full 2π radians. All signals are TTL compatible. Fabricated in a submicron CMOS process, the TMC2340A operates at the 50 MHz maximum clock rate over the full commercial temperature (0 to 70°C and supply (4.75 to 5.25V) voltage ranges, and is available in low-cost 120-pin plastic pin grid array (PPGA) and a 120-lead metric quad flat pack (MQFP) package.

• User-configurable phase accumulator for waveform synthesis, frequency modulation or phase modulation Amplitude input for amplitude modulation and gain adjustment
• Guaranteed 50 Msps pipelined data throughput rate
• 15-bit magnitude, 32-bit phase data input precision
• 16-bit offset binary or 15-bit unsigned magnitude output dataformat
• Input register clock enables simplify interfacing
• Low power consumption CMOS process
• Single +5V power supply
• Available in a 120-pin plastic pin grid array package (PPGA) and 120-pin metric quad fat pack (MQFP)

• Digital waveform synthesis, including quadrature functions
• Digital modulation and demodulation