LCSC Electronics logoLCSC Electronics svg logo
로그인
USD
NXP PTN3361CBSMP product image
실제 제품과 다를 수 있음

NXP PTN3361CBSMP

제조업체
제조사 품번
PTN3361CBSMP
LCSC 번호
C2676865
포장
HVQFN-32-EP(5x5)
고객 번호
주요 제원
HVQFN-32-EP(5x5) Video Processing RoHS
데이터시트NXP PTN3361CBSMP
RoHS 준수1개 문서 이용 가능
모든 주문 보장
100% 정품 · 30일 반품 또는 교환
품절
재입고 알림
최소값: 1배수: 1판매 단위: Piece
BOM 목록에 추가
수량단가(참고용)총액
1+$ 3.5635$ 3.56
10+$ 3.0509$ 30.51
30+$ 2.7446$ 82.34
100+$ 2.4352$ 243.52
500+$ 2.2936$ 1146.80
1,000+$ 2.2289$ 2228.90
표준 패키지6000/Full Reel
수량이 많을수록 더 좋은 가격?
$

제품 사양

전체
타입설명
카테고리Integrated Circuits (ICs)/Linear/Video Processing
제조업체NXP
포장HVQFN-32-EP(5x5)
FeaturesLink equalization and compensation
도움말 및 피드백유사 제품 보기 (0) >

개요

AI 번역

PTN3361C is a high-speed level shifter that converts 4 low-swing AC-coupled differential input signals to open-drain current-steering differential output signals compliant with DVI v1.0 and HDMI v1.4b standards, supporting up to 1.65 Gbit/s per channel for 1080p applications. Each channel provides a level-shifting differential buffer that converts low-swing AC-coupled differential signals from the source into TMDS-type DC-coupled differential current-mode signals, terminated at 50 Ω to 3.3 V at the receiver. In addition, PTN3361C provides a single-ended active buffer for the HPD signal to perform voltage level shifting, converting 5 V at the receiver to 3.3 V at the source, and provides active buffering and level shifting for the DDC channel (comprising one clock line and one data line) between the 3.3 V source and 5 V receiver. The DDC channel is implemented using active I2C bus buffer technology, providing capacitance isolation, re-driving, level shifting, and the ability to disable (isolate between source and receiver) the clock and data lines. The low-swing AC-coupled differential signals input to PTN3361C typically originate from display sources with multi-mode I/O that support multiple display standards such as DisplayPort, HDMI, and DVI. When the differential input signals are configured to carry DVI or HDMI encoded data, they do not meet the electrical requirements of the DVI v1.0 or HDMI v1.4b specifications. By using PTN3361C, chip vendors can implement this reconfigurable I/O on multi-mode display source devices, reducing the number of chip I/O pins while supporting multiple display standards. The low-swing self-biased differential inputs of PTN3361C comply with the DisplayPort Standard v1.2 and/or PCI Express Standard v1.1 electrical specifications, and the open-drain current-steering differential outputs comply with the DVI v1.0 and HDMI v1.4b electrical specifications. The I2C bus channel provides active buffering and level shifting for DDC signals with capacitance isolation. PTN3361C also supports a power-saving mode that minimizes current consumption when no display is active or connected. PTN3361C can be used for HDMI or DVI level shifting. It provides additional functionality to support HDMI dongle detection; since HDMI dongle detection via the DDC channel must be supported, system applications must enable this feature for correct operation. PTN3361C is powered by a single 3.3 V supply and is available in a 32-pin HVQFN32 package.

주요 특징

AI 번역
  • Converts 4 low-swing AC-coupled differential input signals to open-drain current-steering differential output signals compliant with DVI v1.0 and HDMI v1.4b standards
  • TMDS level shifting up to 1.65 Gbit/s per channel
  • Programmable equalizer
  • Integrated 50 Ω termination resistors for self-biased differential inputs
  • Output reverse-current protection — no current flow when device is powered down and display is active
  • Disable function to shut down TMDS inputs and outputs for low-power state
  • Integrated DDC buffer and level shifting (3.3 V source to 5 V sink)
  • Rise-time accelerator on sink DDC port
  • Supports 0 Hz to 400 kHz I2C bus clock frequency
  • Sink port backflow protection — no backflow current when powered down or DDC disabled
  • HPD non-inverting level shifting: sink 0 V to source 0 V, or sink 5 V to source 3.3 V
  • HPD sink input with integrated 200 kΩ pull-down resistor, ensuring low-level input when no display is connected
  • HPD_SINK reverse-current protection — no backflow current when powered down
  • Integrated I2C slave ROM
  • Responds to DDC reads at address 81h, returning a predefined byte sequence
  • Function enabled by DDET pin (must be enabled for correct operation in systems using HDMI dongles)
  • Supply voltage range 3.0 V to 3.6 V
  • ESD immunity up to 6 kV HBM, 1 kV CDM
  • Power-saving mode support (via output enable control)
  • All sink main link, DDC, and HPD terminals with reverse-current protection
  • Transparent operation: no retiming or software configuration required
  • 32-pin HVQFN32 package

응용 분야

AI 번역
  • PC motherboard/graphics card
  • Docking station
  • DisplayPort to HDMI dongle/adapter supporting deep color video formats (DDET must be enabled)
  • DisplayPort to DVI dongle/adapter for driving long cables