onsemi MC74AC74DTR2G
| 制造商 | |
| 制造商型号 | MC74AC74DTR2G |
| LCSC 编号 | C463535 |
| 包装 | TSSOP-14 |
| 客户编号 | |
| 关键特性 | 2V~6V 1 2 10ns@5V,50pF TSSOP-14 Flip Flops RoHS |
| 数据手册 | onsemi MC74AC74DTR2G |
| RoHS认证 | 现有 4 份文件 |
| 替代型号 | 5 |
产品规格
| 类型 | 描述 | |
|---|---|---|
| 类别 | Integrated Circuits (ICs)/Logic/Flip Flops | |
| 制造商 | onsemi | |
| 包装 | TSSOP-14 | |
| Voltage - Supply | 2V~6V | |
| Number of Bits per Element | 1 | |
| Output Type | Complementary | |
| Operating Temperature | -40℃~+85℃ | |
| Series | 74AC Series | |
| Synchronous/Asynchronous | Asynchronous | |
| Number of Elements | 2 | |
| Current - Output High(IOH) | 24mA | |
| Current - Output Low(IOL) | 24mA | |
| Setup Time | 1ns | |
| Quiescent Current | 4uA | |
| Hold Time | 1.5ns | |
| Propagation Delay | 10ns@5V,50pF | |
| Trigger Type | Rising Edge |
| 类型 | 描述 | |
|---|---|---|
| 类别 | Integrated Circuits (ICs)/Logic/Flip Flops | |
| 制造商 | onsemi | |
| 包装 | TSSOP-14 | |
| Voltage - Supply | 2V~6V | |
| Number of Bits per Element | 1 | |
| Output Type | Complementary | |
| Operating Temperature | -40℃~+85℃ | |
| Series | 74AC Series | |
| Synchronous/Asynchronous | Asynchronous |
| 类型 | 描述 | |
|---|---|---|
| Number of Elements | 2 | |
| Current - Output High(IOH) | 24mA | |
| Current - Output Low(IOL) | 24mA | |
| Setup Time | 1ns | |
| Quiescent Current | 4uA | |
| Hold Time | 1.5ns | |
| Propagation Delay | 10ns@5V,50pF | |
| Trigger Type | Rising Edge |
概述
The MC74AC74/74ACT74 is a dual D−type flip−flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input. Asynchronous Inputs: LOW input to S(overline)_D (Set) sets Q to HIGH level LOW input to C(overline)_D (Clear) sets Q to LOW level Clear and Set are independent of clock Simultaneous LOW on C(overline)_D and S(overline)_D makes both Q and Q HIGH
特性
- Outputs Source/Sink 24 mA
- ′ACT74 Has TTL Compatible Inputs
- These are Pb−Free Devices
产品规格
| 类型 | 描述 | |
|---|---|---|
| 类别 | Integrated Circuits (ICs)/Logic/Flip Flops | |
| 制造商 | onsemi | |
| 包装 | TSSOP-14 | |
| Voltage - Supply | 2V~6V | |
| Number of Bits per Element | 1 | |
| Output Type | Complementary | |
| Operating Temperature | -40℃~+85℃ | |
| Series | 74AC Series | |
| Synchronous/Asynchronous | Asynchronous | |
| Number of Elements | 2 | |
| Current - Output High(IOH) | 24mA | |
| Current - Output Low(IOL) | 24mA | |
| Setup Time | 1ns | |
| Quiescent Current | 4uA | |
| Hold Time | 1.5ns | |
| Propagation Delay | 10ns@5V,50pF | |
| Trigger Type | Rising Edge |
| 类型 | 描述 | |
|---|---|---|
| 类别 | Integrated Circuits (ICs)/Logic/Flip Flops | |
| 制造商 | onsemi | |
| 包装 | TSSOP-14 | |
| Voltage - Supply | 2V~6V | |
| Number of Bits per Element | 1 | |
| Output Type | Complementary | |
| Operating Temperature | -40℃~+85℃ | |
| Series | 74AC Series | |
| Synchronous/Asynchronous | Asynchronous |
| 类型 | 描述 | |
|---|---|---|
| Number of Elements | 2 | |
| Current - Output High(IOH) | 24mA | |
| Current - Output Low(IOL) | 24mA | |
| Setup Time | 1ns | |
| Quiescent Current | 4uA | |
| Hold Time | 1.5ns | |
| Propagation Delay | 10ns@5V,50pF | |
| Trigger Type | Rising Edge |
概述
The MC74AC74/74ACT74 is a dual D−type flip−flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input. Asynchronous Inputs: LOW input to S(overline)_D (Set) sets Q to HIGH level LOW input to C(overline)_D (Clear) sets Q to LOW level Clear and Set are independent of clock Simultaneous LOW on C(overline)_D and S(overline)_D makes both Q and Q HIGH
特性
- Outputs Source/Sink 24 mA
- ′ACT74 Has TTL Compatible Inputs
- These are Pb−Free Devices
C463535 EasyEDA 元器件库
合规 & 出口编码
| 类型 | 详情 |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| 类型 | 详情 |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| 类型 | 详情 |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



