Infineon/CYPRESS CY7C188-35VC

CY7C188 is a high-performance CMOS static random access memory organized as 32,768 words × 9 bits. Memory expansion is easily achieved through active-low chip enable (CE1̄), active-high chip enable (CE2), active-low output enable (OE), and three-state drivers. The device features automatic power-down, reducing power consumption by more than 75% when deselected. To write data to the device, CE1̄ and write enable (WE) inputs are driven low while CE2 is driven high, then data on the nine I/O pins (I/O0–I/O8) is written to the location specified by the address pins (A0–A14). To read data from the device, CE1̄ and OE are driven low while WE and CE2 are driven high, causing the contents of the memory location specified by the address pins to appear on the I/O pins. The nine I/O pins (I/O0–I/O8) are in a high-impedance state when the device is deselected (CE1̄ high or CE2 low), the output is disabled (OĒ high), or a write operation is in progress (CE1̄ low, CE2 high, and WĒ low). The CY7C188 is offered in a standard 300-mil wide small outline J-lead package (SOJ).

• High Speed — 15ns
• Automatic Power-Down When Deselected
• Low Active Power — 660mW
• Low Standby Power — 140mW
• CMOS Speed/Power Ratio
• TTL-Compatible Inputs and Outputs
• Easy Memory Expansion via CE1, CE2, and OE Features