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MXIC MX25R3235FZBIL0TR product image
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MXIC MX25R3235FZBIL0TR

제조업체
제조사 품번
MX25R3235FZBIL0TR
LCSC 번호
C2802830
포장
USON-8(4x3)
고객 번호
주요 제원
32Mbit 1.65V~3.6V 80MHz SPI USON-8(4x3) Memory
데이터시트MXIC MX25R3235FZBIL0TR
대체 부품1
모든 주문 보장
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제품 사양

전체
타입설명
카테고리Integrated Circuits (ICs)/Memory/Memory
제조업체MXIC
포장USON-8(4x3)
Operating Temperature-40℃~+85℃
FeaturesWrite enable latch;Power-on reset;Hardware Write Protection;Software Write Protection;Absolute Write Protection
Memory Size32Mbit
Voltage - Supply1.65V~3.6V
Program / Erase Cycles100,000 cycles
Clock Frequency80MHz
Data Retention - TDR (Year)20 Years
Block Erase Time(tBE)-
Write Cycle Time(tWC)-
Page Programming Time (Tpp)-
Standby Supply Current5uA
InterfaceSPI
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주요 특징

AI 번역
  • SPI support — Mode 0 and Mode 3
  • 33,554,432 x 1-bit, 16,777,216 x 2-bit (Dual I/O mode), or 8,388,608 x 4-bit (Quad I/O mode) organization
  • 4K-byte sectors, 32K-byte or 64K-byte blocks; any block individually erasable
  • Single power supply operation
  • Operating voltage: 1.65V–3.6V for read, erase, and program operations
  • Latch-up protection: -1V to Vcc+1V, 100mA
  • High performance
  • Fast read: 1 I/O: 80MHz, 8 dummy cycles; 2 I/O: 80MHz, 4 dummy cycles, equivalent to 160MHz; 4 I/O: 80MHz, 2+4 dummy cycles, equivalent to 320MHz
  • Fast program and erase times
  • 8/16/32/64-byte wrap burst read mode
  • Performance-enhanced mode support — XIP (eXecute In Place)
  • Ultra-low power consumption
  • Minimum 100,000 erase/program cycles
  • 20-year data retention
  • Input data format: 1-byte command code
  • Advanced security features: block lock protection
  • BP0–BP3 status bits define software-protected area size against program and erase instructions
  • Additional 8K-bit security OTP
  • With identifier
  • Factory-lockable identifiable and customer-lockable
  • Auto-erase and auto-program algorithms
  • Auto-erase and verify data in selected sectors or blocks
  • Auto-program and verify data in selected pages via internal algorithm with auto-timed program pulse width (any page to be programmed must first be in erased state)
  • Status register features
  • Command reset
  • Program/erase suspend and program/erase resume
  • Electronic identification: JEDEC 1-byte manufacturer ID and 2-byte device ID; RES command for 1-byte device ID; REMS command for 1-byte manufacturer ID and 1-byte device ID
  • Serial Flash Discoverable Parameters (SFDP) mode support
  • ID support
  • SCLK input: serial clock input
  • SI/SIO0: serial data input, or serial data I/O for 2×I/O and 4×I/O read modes
  • SO/SIO1: serial data output, or serial data I/O for 2×I/O and 4×I/O read modes
  • WP#/SIO2: hardware write protect, or serial data I/O for 4×I/O read mode
  • RESET#/SIO3 or HOLD#/SIO3: hardware reset pin, or serial I/O for 4×I/O read mode; or HOLD function to pause the device without deselecting it, or serial I/O for 4×I/O read mode
  • Package: 8-pin SOP (150mil/200mil), 8-pad WSON (6x5mm), 8-pad USON (4x3mm)