TI CD4060BPWR

CD4060B consists of an oscillator section and 14 ripple-carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A RESET input is provided which resets the counter to the all-0's state and disables the oscillator. A high level on the RESET line accomplishes the reset function. All counter stages are master-slice flip-flops. The state of the counter is advanced one step in binary order on the negative transition of Φ1 (and Φ0). All inputs and outputs are fully buffered. Schmitt trigger action on the input-pulse line permits unlimited input-pulse rise and fall times.

• 12 MHz clock rate at 15 V
• Common reset
• Fully static operation
• Buffered inputs and outputs
• Schmitt trigger input-pulse line
• 100% tested for quiescent current at 20 V
• Standardized, symmetrical output characteristics
• 5-V, 10-V, and 15-V parametric ratings
• Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for description of "B" Series CMOS Devices"
• All active components on chip
• RC or crystal oscillator configuration
• RC oscillator frequency of 880 kHz min. at 15 V

• Control counters
• Timers
• Frequency dividers
• Time-delay circuits