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TI SN74LVC126APWR product image
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TI SN74LVC126APWRRoHS

Manufacturer
MPN
SN74LVC126APWR
LCSC Part #
C7815
Packaging
TSSOP-14
Customer #
Key Attributes
Quadruple Bus Buffer Gate with 3-State Outputs
Datasheetpdf iconTI SN74LVC126APWR
In-Stock: 3,460
3,460 In stock, ships now
Add to BOM List
QtyUnit PriceTotal Amount
5+$ 0.3806$ 1.90
50+$ 0.3104$ 15.52
150+$ 0.2804$ 42.06
500+$ 0.2333$ 116.65
2,000+$ 0.2166$ 433.20
4,000+$ 0.2066$ 826.40
Standard Packaging2000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers
ManufacturerTI
PackagingTSSOP-14
Input type-
Voltage - Supply1.65V~3.6V
Output TypeTri-State
Current - Output High(IOH)24mA
Series74LVC
Operating Temperature-40℃~+125℃
Current - Output Low(IOL)24mA
Number of Bits per Element1
Channel TypeUnidirectional
FeaturesOutput enable;Level shifting
Number of Elements4
Propagation Delay2.5ns@3.3V,50pF
Quiescent Current40uA

Additional Information

TypeDetails
Minimum5
Multiple5
Standard Packaging2000
Sales UnitPiece

Introduction

AI Translation

This quadruple bus buffer gate is designed for 1.65- V to 3.6 -VCC operation. The SN74LVC126A features independent line drivers with 3- state outputs. Each output is disabled when the associated output- enable (OE) input is low. Inputs can be driven from either 3.3- V or 5- V devices. This feature allows the use of this device as a translator in a mixed 3.3- V/5- V system environment.

Features

AI Translation
  • Operates From 1.65 V to 3.6 V
  • Specified From - 40℃ to 85℃ and From - 40℃ to 125℃
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.7 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25℃
  • Typical VOLV (Output VOL Undershoot) >2 V at VCC = 3.3 V, TA = 25℃
  • Latch- Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22 - 2000- V Human- Body Model (A114- A) - 200- V Machine Model (A115- A)