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MAXIM MAX96724FGTN/V+ product image
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MAXIM MAX96724FGTN/V+RoHS

Manufacturer
MAXIM
MPN
MAX96724FGTN/V+
LCSC Part #
C7458192
Packaging
TQFN-56(8x8)
Customer #
Key Attributes
Quad Tunneling GMSL2/1 to CSl-2 Deserializer
Datasheetpdf iconMAXIM MAX96724FGTN/V+
In-Stock: 240
240 In stock, ships now
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QtyUnit PriceTotal Amount
1+$ 9.4348$ 9.43
Standard Packaging260/Full Tray
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Interface/Serializers, Deserializers
ManufacturerMAXIM
PackagingTQFN-56(8x8)
OutputMIPI
Clock Frequency-
Input-
Data Rate3Gbps
Number of ports4
TypeDeserializer
Voltage - Supply1.7V~3.6V
Parallel Bit Count Per Channel-
FeaturesAdaptive receive equalization;Link status monitoring
Operating Temperature-40℃~+105℃
Control InterfaceI2C
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Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging260
Sales UnitPiece

Introduction

AI Translation

The MAX96724/F/R deserializer converts four GMSL2/1 inputs to 1, 2, or 4 MIPI D-PHY or C-PHY outputs. The device allows simultaneous transmit bidirectional transmissions over 50Ω coax or 100Ω STP cables that meet the GMSL channel specification. Up to four remotely located sensors can be supported using industry-standard coax or STP interconnects. Each GMSL2 serial link operates at a fixed rate of 3Gbps or 6Gbps in the forward direction and 187.5Mbps in the reverse direction. The MAX96724/F/R supports both aggregation and replication of video data, enabling streams from multiple remotely located sensors to be combined and routed to one or more of the available CSI-2 outputs.

Features

AI Translation
  • -21.0dB at 3.06Hz (6Gbps) Max Insertion Loss
  • -19.5dB at 1.5GHz (3Gbps) Max Insertion Loss
  • Auto Adapt for Changes in Channel Conditions
  • Operates at -40°C to +105°C Ambient
  • Quad Independently Configurable GMSL Inputs
  • 6/3Gbps GMSL2 and 3.12Gbps GMSL1 Link-Rates
  • 187.5Mbps/1Mbps (GMSL2/1) Reverse Link-Rates
  • Support for Mixed GMSL2/1 Pixel and Tunnel Inputs
  • 2x4 or 4x2 Lane MIPI CSI-2 v1.3 Outputs
  • MIPI D-PHY v1.2 Rated at 2.5Gbps/Lane
  • C-PHY v1.0 Rated at 5.7Gbps/Lane
  • Aggregation and Replication Functions
  • 16/32 Virtual channel support for D-PHY/C-PHY
  • Auto D-PHY (Imager) to C-PHY (SoC) Conversion
  • Reference over Reverse (RoR) Clocking
  • Bidirectional Reverse Channel Supports
  • 9x Configurable GPIOs
  • 2x120 Ports, up to 1Mbps
  • ASIL-B Compliant (MAX96724/F)
  • Ease of Use Features Reduce BOM and Space Savings
  • Small 8x8mm TQFN Standard and Side-Wettable
  • Industry's Smallest Power-over-Coax (PoC)

Applications

AI Translation
  • High-Resolution Camera Systems
  • Advanced Driver Assistance Systems (ADAS)