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SPI (Serial Peripheral Interface) NAND Flash provides a low cost and low pin count solution to alternate SPI-NOR in high density non-volatile memory storage solution for embedded systems. SPI NAND Flash is an SLC NAND Flash memory device based on the standard parallel NAND Flash. The serial electrical interface follows the industry-standard serial peripheral interface. The command sets is similar to the SPI-NOR command sets but with some modifications to handle NAND specific functions and new features are added to extend applications. The SPI NAND flash device has total 8 pin count, including six signal lines plus VCC and GND. Each block of the serial NAND Flash device is subdivided into 64 programmable pages. Each page consists of a data storage region and a spare area. The data storage region is used to storage data user programmed and the spare area is typically used for memory management and error correction functions.

• Standard Dual and Quad SPI
  • Standard SPI: SCLK, CS#, SI, SO, WP#, HOLD#
  • Dual SPI: SCLK, CS#, SIO0, SIO1, WP#, HOLD#
  • Quad SPI: SCLK, CS#, SIO0, SIO1, SIO2, SIO3
• Flash Features
  • Block Size : (Page size) x (64 page/block)
  • Page Size : 2048+128 bytes
  • SPI Capacity : 2Gb (2048 blocks)
• Performance
  • Read Page Time: 45 μs (Typ)
  • Program time: 350 μs (Typ)
  • Block Erase time: 4.0 ms (Typ)
• SPI power supply voltage
  • Full voltage range for 3.3V: 2.7 to 3.6V
• Reliability
  • On-chip ECC correction Program
  • Operating Temperature: -40 ℃ to 85 ℃
  • Blocks 0 - 7 are good at the time of shipment
  • 100,000 Program / Erase cycles (Typ)
  • 10 Year Data Retention (Typ)
• Security Features
  • One Time Programmable (OTP) area
  • Serial number (unique ID) (Contact factory for support)
  • Hardware program/erase disabled during power transition
  • Volatile and Permanent Block Protection
• SPI Max. Clock Frequency
  • 104MHz @ 3.3V