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MICROCHIP AT25512N-SH-BRoHS

Manufacturer
MICROCHIP
MPN
AT25512N-SH-B
LCSC Part #
C68030
Packaging
SOIC-8
Customer #
Key Attributes
SPI Serial EEPROM
Datasheetpdf iconMICROCHIP AT25512N-SH-B
In-Stock: 102
102 In stock, ships now
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QtyUnit PriceTotal Amount
1+$ 4.0071$ 4.01
10+$ 3.5505$ 35.51
30+$ 3.2645$ 97.94
100+$ 2.9249$ 292.49
500+$ 2.7916$ 1395.80
1,000+$ 2.7348$ 2734.80
Standard Packaging100/Full Tube
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Memory/Memory (ICs)
ManufacturerMICROCHIP
PackagingSOIC-8
Memory Size512Kbit
Voltage - Supply1.8V~5.5V
Operating temperature-40℃~+85℃
Clock Frequency20MHz
FeaturesHardware write protection function;Built-in write enable latch (WEL);Page write protection function;Software write protection function
Data Retention - TDR (Year)40 Years
Write Cycle Time(tWC)5ms
Write Cycle Endurance1,000,000 cycles
InterfaceSPI
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Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging100
Sales UnitPiece

Introduction

AI Translation

The Atmel AT25512 provides 524,288 bits of Serial Electrically Erasable Programmable Read-Only Memory (EEPROM) organized as 65,536 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The devices are available in space saving 8-lead JEDEC SOIC, 8-lead TSSOP, and 8-pad UDFN packages. In addition, the device operates from 1.8V to 5.5V.

The AT25512 is enabled through the Chip Select pin (CS) and accessed via a 3-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock (SCK). All programming cycles are completely self-timed, and no separate erase cycle is required before write.

Block Write Protection is enabled by programming the status register with top %, top %, or entire array of Write Protection. Separate program enable and program disable instructions are provided for additional data protection. Hardware Data Protection is provided via the WP pin to protect against inadvertent write attempts to the status register. The HOLD pin may be used to suspend any serial communication without resetting the serial sequence.

Features

AI Translation
  • Serial Peripheral Interface (SPI) Compatible
  • Supports SPI Modes 0 (0,0) and 3 (1,1)
  • Datasheet Describes Mode 0 Operation
  • Low-voltage Operation (1.8 to 5.5V)
  • 20MHz Clock Rate (4.5V to 5.5V)
  • 128-byte Page Mode and Byte Write Operation Supported
  • Block Write Protection Protect %, %, or Entire Array
  • Write Protect (WP) Pin and Write Disable Instructions for Both Hardware and Software Data Protection
  • Self-timed Write Cycle (5ms Max)
  • High Reliability Endurance: 1,000,000 Write Cycles Data Retention: 40 Years
  • Lead-free/Halogen-free Devices
  • 8-lead JEDEC SOIC, 8-lead TSSOP, and 8-pad UDFN Packages
  • Die Sale Options: Wafer Form, Waffle Pack, and Bumped Die