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MICROCHIP dsPIC33CH64MP208T-I/PT product image
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MICROCHIP dsPIC33CH64MP208T-I/PT

Hersteller
MICROCHIP
Herst.-Teilenr.
dsPIC33CH64MP208T-I/PT
LCSC-Nr.
C630582
Verp.
TQFP-80(12x12)
Kundennummer
Hauptmerkm.
TQFP-80(12x12) Microcontrollers RoHS
DatenblattMICROCHIP dsPIC33CH64MP208T-I/PT
RoHS-Konformität2 Dokumente verfügbar
Nicht vorrätig
Benachrichtigen
Minimum: 1Vielfaches: 1Verkaufseinheit: Piece
Zur BOM-Liste hinzufügen
Stk.E-Preis(Nur als Referenz)Gesamtbetrag
1+$ 8.19$ 8.19
200+$ 3.1699$ 633.98
500+$ 3.0592$ 1529.60
1,200+$ 3.0039$ 3604.68
Standardgehäuse1200/Full Reel
Besserer Preis bei größerer Menge?
$

Produktspezifikationen

Alle
TypBeschreibung
KategorieIntegrated Circuits (ICs)/Embedded/Microcontrollers
HerstellerMICROCHIP
Verp.TQFP-80(12x12)
Operating Temperature-40℃~+85℃
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Merkmale

KI-Übersetzung
  • Master/Slave Core Operation
  • Independent Peripherals for Master Core and Slave Core
  • Dual Partition for Slave PRAM LiveUpdate
  • Configurable Shared Resources for Master Core and Slave Core
  • Master Core with 64 - 128 Kbytes of Program Flash with ECC and 16K RAM
  • Slave Core with 24 Kbytes of Program RAM (PRAM) with ECC and 4K Data Memory RAM
  • Fast Six - Cycle Divide
  • Message Boxes and FIFO to Communicate Between Master and Slave (MSI)
  • Code Efficient (C and Assembly) Architecture
  • 40 - Bit Wide Accumulators
  • Single - Cycle (MAC/MPY) with Dual Data Fetch
  • Single - Cycle, Mixed - Sign MUL Plus Hardware Divide
  • 32 - Bit Multiply Support
  • Five Sets of Interrupt Context Selected Registers and Accumulators per Core for Fast Interrupt Response
  • Zero Overhead Looping
  • Internal Oscillator
  • Programmable PLLs and Oscillator Clock Sources
  • Master Reference Clock Output
  • Slave Reference Clock Output
  • Fail - Safe Clock Monitor (FSCM)
  • Fast Wake - up and Start - up
  • Backup Internal Oscillator
  • LPRC Oscillator
  • Low - Power Management Modes (Sleep, Idle, Doze)
  • Integrated Power - on Reset and Brown - out Rese
  • Up to 12 PWM Channels: Four channels for Master, Eight channels for Slave
  • 250 ps PWM Resolution
  • Two General Purpose 16 - Bit Timers: One each for Master and Slave
  • Peripheral Trigger Generator (PTG) Module: One module for Master, Slave can interrupt on select PTG sources, Useful for automating complex sequences
  • 12 SCCP Modules: Eight modules for Master, Four modules for Slave, Timer, Capture/Compare and PWM Modes, 16 or 32 - bit time base, 16 or 32 - bit capture, Four - deep capture buffer, Fully Asynchronous Operation, Available in Sleep Modes
  • Four ADC Modules: One module for Master core, Three modules for Slave core, 12 - bit, 3.5 Msps ADC, Up to 18 conversion channels
  • Four DAC/Analog Comparator Modules: One module for Master core, Three modules for Slave core, 12 - bit DACs with hardware slope compensation, 15 ns analog comparators
  • Three PGA Modules: Three modules for Slave core, Can be read by Master ADC, Option to interface with Master ADC
  • Shared DAC/Analog Output: DAC/analog comparator outputs, PGA outputs
  • PPS to Allow Function Remap
  • Programmable Cyclic Redundancy Check (CRC) for the Master
  • Two SENT Modules for the Master
  • Eight DMA Channels: Six DMA channels available for the Master core, Two DMA channels available for the Slave core
  • In - Circuit and In - Application Programming
  • Simultaneous Debugging Support for Master and Slave Cores
  • Master Only Debug and Slave Only Debug Support
  • Master with Three Complex, Five Simple Breakpoints and Slave with One Complex, Two Simple Breakpoints
  • IEEE 1149.2 Compatible (JTAG) Boundary Scan
  • Trace Buffer and Run - Time Watch
  • Three UART Modules: Two modules for Master core, One module for Slave core, Support for DMX and LIN/J2602 protocols
  • Three 4 - Wire SPI/I²S Modules: Two modules for Master core, One module for Slave core
  • CAN Flexible Data - Rate (FD) Module for the Master Core
  • Three I²C Modules: Two modules for Master, One module for Slave, Support for SMBus
  • DMT (Deadman Timer)
  • ECC (Error Correcting Code)
  • WDT (Watchdog Timer)
  • CodeGuard™ Security
  • CRC (Cyclic Redundancy Check)
  • Two - Speed Start - up
  • Fail - Safe Clock Monitoring
  • Backup FRC (BFRC)
  • Capless Internal Voltage Regulator
  • Virtual Pins for Redundancy and Monitoring
  • AEC - Q100 REVG (Grade 1: - 40°C to + 125°C) Compliant
  • Class B Safety Library, IEC 60730

Anwendungen

KI-Übersetzung
  • DC/DC Converters
  • AC/DC power supplies
  • Uninterruptable Power Supply (UPS)
  • Motor Control: BLDC, PMSM, SR, ACIM