NTE Electronics NTE74HC161
| Manufacturer | |
| MPN | NTE74HC161 |
| LCSC Part # | C6135141 |
| Packaging | DIP-16 |
| Customer # | |
| Key Attributes | Rising Edge 1 40MHz DIP-16 Counters, Dividers RoHS |
| Datasheet |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Counters, Dividers | |
| Manufacturer | NTE Electronics | |
| Packaging | DIP-16 | |
| Logic Family | 74HC | |
| Voltage - Supply | 2V~6V | |
| Direction | Up Counter | |
| Trigger Type | Rising Edge | |
| Timing | Synchronous | |
| Operating Temperature | -55℃~+85℃ | |
| Reset | Asynchronous | |
| Number of Elements | 1 | |
| Propagation Delay | - | |
| Count Rate | 40MHz | |
| Features | Synchronous counting;Cascade counter;Reset function |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Counters, Dividers | |
| Manufacturer | NTE Electronics | |
| Packaging | DIP-16 | |
| Logic Family | 74HC | |
| Voltage - Supply | 2V~6V | |
| Direction | Up Counter | |
| Trigger Type | Rising Edge |
| Type | Description | |
|---|---|---|
| Timing | Synchronous | |
| Operating Temperature | -55℃~+85℃ | |
| Reset | Asynchronous | |
| Number of Elements | 1 | |
| Propagation Delay | - | |
| Count Rate | 40MHz | |
| Features | Synchronous counting;Cascade counter;Reset function |
Introduction
The NTE74HC161 (asynchronous clear) and NTE74HC163 (synchronous clear) are synchronous presettable counters in 16-pin DIP packages. They utilize advanced silicon-gate CMOS technology with internal look-ahead carry logic, making them suitable for high-speed counting applications. They feature the inherent high noise immunity and low power consumption of CMOS, with speed comparable to low-power Schottky TTL. All flip-flops are triggered simultaneously on the low-to-high transition (positive edge) of the clock input waveform.
These counters can be preset using the LOAD input. Presetting of all four flip-flops is synchronous with the rising edge of the clock. When LOAD is held LOW, the count function is disabled and data on the A, B, C, and D inputs is loaded into the counter on the rising clock edge. If the LOAD input is brought HIGH before the positive clock edge, the count operation is unaffected.
Both counters can be cleared using the CLEAR input. The clear function of the NTE74HC163 is synchronous with the clock — when the clear input is held LOW, the counter clears on the positive clock edge.
The NTE74HC161 counter features asynchronous clear. When CLEAR is brought LOW, the counter clears immediately regardless of the clock state.
Two active-HIGH enable inputs (ENP and ENT) and a ripple carry (RC) output are provided to facilitate counter cascading. Both enable inputs must be HIGH for counting to occur. The ENT input also enables the RC output. When enabled, the RC output produces a positive pulse upon counter overflow, with a pulse duration approximately equal to the duration of the HIGH portion of the QA output. The RC output is fed to subsequent cascaded stages to facilitate N-bit counter implementation.
All inputs are protected against ESD damage by diodes connected to VCC and GND.
Features
- Typical operating frequency: 40MHz
- Typical propagation delay, clock to Q: 18ns
- Low quiescent current: 80μA (max)
- Low input current: 1μA (max)
- Wide supply voltage range: 2V ~ 6V
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 2.3291 | $ 2.33 |
| 200+ | $ 0.9304 | $ 186.08 |
| 500+ | $ 0.8986 | $ 449.30 |
| 1,000+ | $ 0.8835 | $ 883.50 |
Standard Packaging1/Full Bag | ||
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Counters, Dividers | |
| Manufacturer | NTE Electronics | |
| Packaging | DIP-16 | |
| Logic Family | 74HC | |
| Voltage - Supply | 2V~6V | |
| Direction | Up Counter | |
| Trigger Type | Rising Edge | |
| Timing | Synchronous | |
| Operating Temperature | -55℃~+85℃ | |
| Reset | Asynchronous | |
| Number of Elements | 1 | |
| Propagation Delay | - | |
| Count Rate | 40MHz | |
| Features | Synchronous counting;Cascade counter;Reset function |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Counters, Dividers | |
| Manufacturer | NTE Electronics | |
| Packaging | DIP-16 | |
| Logic Family | 74HC | |
| Voltage - Supply | 2V~6V | |
| Direction | Up Counter | |
| Trigger Type | Rising Edge |
| Type | Description | |
|---|---|---|
| Timing | Synchronous | |
| Operating Temperature | -55℃~+85℃ | |
| Reset | Asynchronous | |
| Number of Elements | 1 | |
| Propagation Delay | - | |
| Count Rate | 40MHz | |
| Features | Synchronous counting;Cascade counter;Reset function |
Introduction
The NTE74HC161 (asynchronous clear) and NTE74HC163 (synchronous clear) are synchronous presettable counters in 16-pin DIP packages. They utilize advanced silicon-gate CMOS technology with internal look-ahead carry logic, making them suitable for high-speed counting applications. They feature the inherent high noise immunity and low power consumption of CMOS, with speed comparable to low-power Schottky TTL. All flip-flops are triggered simultaneously on the low-to-high transition (positive edge) of the clock input waveform.
These counters can be preset using the LOAD input. Presetting of all four flip-flops is synchronous with the rising edge of the clock. When LOAD is held LOW, the count function is disabled and data on the A, B, C, and D inputs is loaded into the counter on the rising clock edge. If the LOAD input is brought HIGH before the positive clock edge, the count operation is unaffected.
Both counters can be cleared using the CLEAR input. The clear function of the NTE74HC163 is synchronous with the clock — when the clear input is held LOW, the counter clears on the positive clock edge.
The NTE74HC161 counter features asynchronous clear. When CLEAR is brought LOW, the counter clears immediately regardless of the clock state.
Two active-HIGH enable inputs (ENP and ENT) and a ripple carry (RC) output are provided to facilitate counter cascading. Both enable inputs must be HIGH for counting to occur. The ENT input also enables the RC output. When enabled, the RC output produces a positive pulse upon counter overflow, with a pulse duration approximately equal to the duration of the HIGH portion of the QA output. The RC output is fed to subsequent cascaded stages to facilitate N-bit counter implementation.
All inputs are protected against ESD damage by diodes connected to VCC and GND.
Features
- Typical operating frequency: 40MHz
- Typical propagation delay, clock to Q: 18ns
- Low quiescent current: 80μA (max)
- Low input current: 1μA (max)
- Wide supply voltage range: 2V ~ 6V
C6135141 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |

