XINLUDA XD74LS161

These synchronous, presettable counters feature an internal carry look- ahead for application in high- speed counting designs. The 'LS160 and 'LS161 are decade counters and the 'LS163 is 4- bit binary counters. Synchronous operation is provided by having all flip- flops clocks simultaneously so that the outputs change coincident with each other when so instructed by the count- enable inputs and internal gating. This mode of operating eliminates the output counting spikes that are normally associated with asynchronous (ripple clock) counters, however counting spikes may occur on the (RCO) ripple carry output. A buffered clock input triggers the four flip- flops on the rising edge of the clock input waveform.

These counters are fully programmable; that is, the outputs may be preset to either level. As presetting is synchronous, setting up a low level at the load input disables the counter and causes and causes the outputs to agree with the setup data after the next clock pulse regardless of the levels of the enable inputs. Low- to- high transition. This restriction is not application to the 'LS160 or 'LS163. The clear function for the 'LS160, and 'LS161 is asynchronous and a low level at the clear input sets all four of the flip- flop outputs low regardless of the levels of clock, load, or enable inputs. The clear function for the 'LS163 is synchronous and a low level at the clear input sets all full of the flip- flop outputs low after the next clock pulse, regardless of the levels of the enable inputs. This synchronous clear allows the count length to be modified easily as decoding the maximum count desired can be accomplished with one external NAND gate. The gate output is connected to the clear input too synchronously clear the counter to 0000(LLL).

The carry look- ahead circuitry provides for cascading counters for n- bit synchronous applications without additional gating. Instrumental in accomplishing this function are two count- enable inputs and a ripple carry output. The ripple carry output thus enabled will produce a high- level output pulse with a duration approximately equal to the high- level portion of the QA output. This high level overflow ripple carry pulse can be used to enable successive cascaded stages. Transitions at the enable P or T inputs of the 'LS160 thru 'LS163 are allowed regardless of the level of the clock input. 'LS160 thru 'LS163 feature a fully independent clock circuit. Changes at control inputs (enable P or T, or load) that will modify the operating mode have no effect until clocking occurs. The function of the counter (whether enabled, disabled, loading, or counting) will be dictated solely by the conditions meeting the stable setup and hold times.

• Internal Look-Ahead for Fast Counting
• Carry Output for n-Bit Cascading
• Synchronous Counting
• Synchronously Programmable
• Load Control Line
• Diode-Clamped Inputs