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Nexperia 74LVC162245ADGG:11 product image
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Nexperia 74LVC162245ADGG:11RoHS

Manufacturer
Nexperia
MPN
74LVC162245ADGG:11
LCSC Part #
C6069
Packaging
TSSOP-48-6.2mm
Customer #
Key Attributes
16-bit transceiver with direction pin; 30 Ohm series termination resistors; 5 V tolerant input/output; 3-state
Datasheetpdf iconNexperia 74LVC162245ADGG:11
In-Stock: 271
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QtyUnit PriceTotal Amount
1+$ 1.3153$ 1.32
10+$ 1.088$ 10.88
30+$ 0.963$ 28.89
100+$ 0.8217$ 82.17
500+$ 0.7584$ 379.20
1,000+$ 0.7308$ 730.80
Standard Packaging2000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers
ManufacturerNexperia
PackagingTSSOP-48-6.2mm
Input typeSchmitt trigger
Voltage - Supply1.65V~3.6V
Output TypeTri-State
Current - Output High(IOH)12mA
Series74LVC
Operating Temperature-40℃~+125℃
Current - Output Low(IOL)12mA
Number of Bits per Element8
Channel TypeBidirectional
FeaturesPower-off isolation;Output enable;Level shifting
Number of Elements2
Propagation Delay2.9ns@3.3V,50pF
Quiescent Current80uA
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Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging2000
Sales UnitPiece

Introduction

AI Translation

The 74LVC162245A; 74LVCH162245A is a 16-bit transceiver with 30 Ω termination resistors and 3-state outputs. The device can be used as two 8-bit transceivers or one 16-bit transceiver. The device features two output enables (1OE and 2OE) each controlling eight outputs, and two send/ receive (1DIR and 2DIR) inputs for direction control. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. The 74LVCH162245A bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs.

Features

AI Translation
  • Overvoltage tolerant inputs to 5.5 V
  • Wide supply voltage range from 1.2 V to 3.6 V
  • CMOS low power consumption
  • Multibyte flow-through standard pin-out architecture
  • Low inductance multiple power and ground pins for minimum noise and ground bounce
  • Direct interface with TTL levels
  • Integrated 30 Ω termination resistors
  • IOFF circuitry provides partial Power-down mode operation
  • All data inputs have bus hold (74LVCH162245A only)
  • Complies with JEDEC standard:
    • JESD8-7A (1.65 V to 1.95 V)
    • JESD8-5A (2.3 V to 2.7 V)
    • JESD8-C/JESD36 (2.7 V to 3.6 V)
  • ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Specified from -40 ℃ to +85 ℃ and from -40 ℃ to +125 ℃

Applications

AI Translation
  • 16-bit transceiver with direction pin
  • 30Ω series termination resistors
  • 5V-tolerant inputs/outputs
  • Three-state
  • Two 8-bit or one 16-bit transceiver
  • Level translator for mixed 3.3V and 5V environments
  • Multibyte flow-through standard pinout architecture
  • Direct TTL-level interface
  • Partial power-down mode operation
  • Bus hold on data inputs (74LVCH162245A only)