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Infineon S26HL512TFPBHI013

Produttore
Infineon
Cod. Prod.
S26HL512TFPBHI013
Cod. LCSC
C5904933
Imballo
FBGA-24(6x8)
Numero Cliente
Attr. chiave
512Mbit 2.7V~3.6V FBGA-24(6x8) Memory RoHS
Scheda TecnicaInfineon S26HL512TFPBHI013
Conformità RoHS1 documenti disponibili
Garanzia su ogni ordine
100% Autentico · Reso o Sostituzione entro 30 Giorni
Esaurito
Avvisami
Minimo: 1Multiplo: 1Unità di vendita: Piece
Aggiungi alla Lista BOM
QtàPr. unit.(Solo per riferimento)Importo totale
1+$ 23.9539$ 23.95
200+$ 9.5585$ 1911.70
500+$ 9.2388$ 4619.40
1,000+$ 9.0812$ 9081.20
Package Standard2500/Full Reel
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Specifiche del Prodotto

Tutto
TipoDescrizione
CategoriaIntegrated Circuits (ICs)/Memory/Memory
ProduttoreInfineon
ImballoFBGA-24(6x8)
Operating Temperature-40℃~+85℃
FeaturesPower-on reset;ECC error correction
Memory Size512Mbit
Voltage - Supply2.7V~3.6V
Program / Erase Cycles1,280,000 Cycles
Clock Frequency-
Data Retention - TDR (Year)25 Years
Block Erase Time(tBE)-
Write Cycle Time(tWC)-
Page Programming Time (Tpp)1.7ms
Standby Supply Current0.014mA
Interface-
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Caratteristiche

Traduzione AI
  • 45nm technology, two bits stored per memory array cell
  • Sector architecture options: uniform and hybrid, with two hybrid configurations available
  • Page program buffer: 256 or 512 bytes
  • 1024-byte one-time programmable Security Silicon Region, organized as 32 × 32 bytes
  • HyperBus interface support, JEDEC xSPI compliant, DDR mode up to 400 MB/s, data strobe support for simplified high-speed read data capture
  • Legacy single-wire SPI support, JEDEC xSPI compliant, SDR mode up to 21 MB/s
  • Default boot from legacy SPI or HyperBus interface
  • Functional safety features: ISO 26262 ASIL B compliant with ASIL D support, high endurance and retention sectors, interface CRC, data integrity CRC, secure boot, built-in ECC, and sector erase status indication
  • Protection features: advanced sector protection at individual memory array sector level, autoboot for immediate post-power-up memory array access, hardware reset via CS# method and dedicated RESET# pin, SFDP for device capability and feature description, and device/manufacturer identification
  • Data integrity: minimum program/erase cycles vary by density for main array; minimum 300,000 program/erase cycles for 4KB sectors across all devices; minimum 25-year data retention
  • Operating voltage: 1.7V to 2.0V and 2.7V to 3.6V
  • Multiple grades and temperature ranges: industrial, enhanced industrial, and AEC-Q100 compliant automotive grades, covering -40°C to +125°C
  • Package options: 256Mb and 512Mb in 24-ball BGA, 6 × 8mm; 1Gb in 24-ball BGA, 8 × 8mm