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ADI AD9956YCPZ

Manufacturer
MPN
AD9956YCPZ
LCSC Part #
C578899
Packaging
LFCSP-48(7x7)
Customer #
Key Attributes
AD9956 2.7 GHz DDS-Based AgileRF Synthesizer
DatasheetADI AD9956YCPZ
RoHS Compliance2 documents available
Alternative Parts1
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QtyUnit Price(Reference Only)Total Amount
1+$ 68.1989$ 68.20
10+$ 65.9301$ 659.30
Standard Packaging260/Full Tray
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Interface/Direct Digital Synthesis (DDS)
ManufacturerADI
PackagingLFCSP-48(7x7)
Resolution (Bits)14
Operating Temperature-40℃~+125℃
Voltage - Supply1.71V~1.96V
FeaturesMulti-chip synchronization;Integrated phase-locked loop;Sweep engine;Integrated modulator;Low-power mode

Introduction

AI Translation

The AD9956 is comprised of DDS and PLL circuitry. The DDS features a 14-bit DAC operating at up to 400 MSPS and a 48-bit frequency tuning word (FTW). The PLL circuitry includes a phase frequency detector with scaleable 200 MHz inputs (divider inputs operate up to 655 MHz) and digital control over the charge pump current. The device also includes a 655 MHz CML-mode PECL-compliant driver with programmable slew rates. The AD9956 uses advanced DDS technology, an internal high speed, high performance DAC, and an advanced phase frequency detector/charge pump combination, which, when used with an external VCO, enables the synthesis of digitally programmable, frequency-agile analog output sinusoidal waveforms up to 2.7 GHz. The AD9956 is designed to provide fast frequency hopping and fine tuning resolution (48-bit frequency tuning word). Information is loaded into the AD9956 via a serial I/O port that has a device write-speed of 25 Mb/s. The AD9956 DDS block also supports a user-defined linear sweep mode of operation. The AD9956 is specified to operate over the extended automotive range of -40°C to +125°C.

Features

AI Translation
  • 400 MSPS internal DDS clock speed
  • 48-bit frequency tuning word
  • 14-bit programmable phase offset
  • Integrated 14-bit DAC
  • Excellent dynamic performance
  • Phase noise ≤ 135 dBc/Hz @ 1 KHz offset
  • -80 dB SFDR @ 160 MHz (±100 KHz offset IOUT)
  • 25 Mb/s write-speed serial I/O control
  • 200 MHz phase frequency detector inputs
  • 655 MHz programmable input dividers for the phase frequency detector (÷M,÷N) {M, N = 1 ..16} (bypassable)
  • Programmable RF divider (÷R) {R = 1,2,4,8} (bypassable)
  • 8 phase/frequency profiles
  • 1.8 V supply for device operation
  • 3.3 V supply for I/O and charge pump
  • Software controlled power-down
  • 48-lead LFCSP package
  • Automatic linear frequency sweeping capability (in DDS)
  • Programmable charge pump current (up to 4 mA)
  • Phase modulation capability
  • Multichip synchronization
  • Dual-mode PLL lock detect
  • 655 MHz CML-mode PECL-compliant driver

Applications

AI Translation
  • Agile LO frequency synthesis
  • FM chirp source for radar and scanning systems
  • Automotive radars
  • Test and measurement equipment
  • Acousto-optic device drivers

Alternative Parts

MPNManufacturerAlternative TypePackagingAvailabilityUnit Price
AD9956YCPZ-REEL7ADIAlt. PackagingLFCSP-48(7x7)2$73.1618 $82.2042
1 more alternative parts.View all substitutes