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EDA 모델EasyEDA
MICROCHIP DSPIC33CK256MC106T-I/PT
| 제조업체 | |
| 제조사 품번 | DSPIC33CK256MC106T-I/PT |
| LCSC 번호 | C5624742 |
| 포장 | TQFP-64(10x10) |
| 고객 번호 | |
| 주요 제원 | TQFP-64(10x10) Microcontrollers RoHS |
| 데이터시트 | MICROCHIP DSPIC33CK256MC106T-I/PT |
| RoHS 준수 | 1개 문서 이용 가능 |
제품 사양
전체
| 타입 | 설명 | |
|---|---|---|
| 카테고리 | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| 제조업체 | MICROCHIP | |
| 포장 | TQFP-64(10x10) | |
| Operating Temperature | -40℃~+85℃ |
| 타입 | 설명 | |
|---|---|---|
| 포장 | TQFP-64(10x10) | |
| Operating Temperature | -40℃~+85℃ |
도움말 및 피드백유사 제품 보기 (0) >
주요 특징
AI 번역
- 128 - 256 Kbytes of Program Flash with ECC and 16 - 32K Data RAM
- Fast 6 - Cycle Divide
- Code Efficient (C and Assembly) Architecture
- 40 - Bit Wide Accumulators Single - Cycle (MAC/MPY) with Dual Data Fetch
- Single - Cycle, Mixed - Sign MUL Plus Hardware Divide
- 32 - Bit Multiply Support
- Five Sets of Interrupt Context Selected Registers for Fast Interrupt Response
- Zero Overhead Looping
- RAM Memory Built - In Self - Test (MBIST)
- 384 Bytes of One - Time - Programmable (OTP) Memory
- Selectable Oscillator Options Including: High - precision, 8 MHz internal Fast RC (FRC) Oscillator; Primary high - speed, crystal/resonator oscillator or external clock; Primary PLL, which can be clocked from FRC or crystal oscillator
- Low - Power Management modes (Sleep and Idle)
- Internal Oscillator
- Programmable PLLs and Oscillator Clock Sources
- Reference Clock Output (REFCLKO)
- Fail - Safe Clock Monitor (FSCM)
- Fast Wake - up and Start - up
- Backup Internal Oscillator
- Low - Power Management Modes (Sleep, Idle, Doze)
- Integrated Power - on Reset and Brown - out Reset
- Four PWM Pairs
- Up to 2 ns PWM Resolution
- Dead Time for Rising and Falling Edges
- Dead - Time Compensation
- Clock Chopping for High - Frequency Operation
- PWM Support for: DC/DC, AC/DC, inverters, PFC, lighting BLDC, PMSM, ACIM, Stepper motors, SRM motors
- Fault and Current Limit Inputs
- Flexible Trigger Configuration for ADC Triggering
- One General Purpose 16 - Bit Timer
- Peripheral Trigger Generator (PTG): Up to 15 trigger sources to other peripheral modules; CPU independent state machine - based instruction sequencer; Two 16 - bit general purpose timers
- Four SCCP modules which Include Timer, Capture/Compare and PWM: Two 16 - bit timers or one 32 - bit timer in each module; PWM resolution down to 2.5 ns (one output per SCCP module); 16 or 32 - bit capture; 4 - deep capture buffer
- Fully Asynchronous Operation, Available in Sleep Modes
- High - Speed ADC module: 12 - bit with one shared SAR ADC core; Configurable resolution (up to 12 - bit); Up to 3.5 Msps conversion rate per channel at 12 - bit resolution; Up to 20 input channels; Dedicated result buffer for each analog channel; Flexible and independent ADC trigger sources; Four digital comparators; Four oversampling filters for increased resolution
- Two Analog Comparators: 15 ns analog comparator
- Up to Three Op Amps: 20 MHz GBW; 40 v/μs slew rate; ±1 mV offset voltage (typical)
- Two 12 - Bit DACs: Hardware slope compensation; One buffered DAC output
- Three Protocol UARTs with Automated Protocol Handling Support for: LIN 2.2; DMX; IrDA
- Two Four - Wire SPI/I2S modules: 16 - byte FIFO; Variable width – I2S mode
- One CAN Flexible Data (FD) module
- One I²C module with SMBus Support
- PPS to Allow Function Remap
- Programmable Cyclic Redundancy Check (CRC)
- One SENT module
- Four DMA Channels
- One Quadrature Encoder Interface (QEI): Four inputs: Phase A, Phase B, Home, Index; One 32 - bit timer/counter (in QEI module, available if encoder is not used)
- Small Pin Count Packages Ranging from 28 to 64 Pins, Including UQFN as Small as 4x4 mm
- High - Current I/O Sink/Source
- Edge or Level Change Notification Interrupt on I/O Pins
- Peripheral Pin Select (PPS) Remappable Pins
- Current Bias Generators
- In - Circuit and In - Application Programming
- Three Complex, Five Simple Breakpoints
- IEEE 1149.2 Compatible (JTAG)
- Boundary Scan
- Trace Buffer and Run - Time Watch
- Backup Fast RC Oscillator (BFRC)
- Brown - out Reset (BOR)
- Capless Internal Voltage Regulator
- Clock Monitor System with Backup Oscillator
- CodeGuard Security
- Cyclic Redundancy Check (CRC)
- Dual Watchdog Timer (WDT)
- Fail - Safe Clock Monitoring (FSCM)
- Flash Error Correcting Code (ECC)
- Flash OTP by ICSP Write Inhibit
- RAM Memory Built - In Self - Test (MBIST)
- Two - Speed Start - up
- Virtual Pins for Redundancy and Monitoring
- Windowed Deadman Timer (DMT)
- AEC - Q100 REV G (Grade 0: - 40°C to + 150°C)
응용 분야
AI 번역
- DC/DC, AC/DC, inverters, PFC, lighting
- BLDC, PMSM, ACIM, Stepper motors, SRM motors
모든 주문 보장
100% 정품 · 30일 반품 또는 교환
품절
재입고 알림
최소값: 1배수: 1판매 단위: Piece
BOM 목록에 추가
| 수량 | 단가(참고용) | 총액 |
|---|---|---|
| 1+ | $ 5.2736 | $ 5.27 |
| 200+ | $ 2.1042 | $ 420.84 |
| 500+ | $ 2.0347 | $ 1017.35 |
| 1,200+ | $ 1.9992 | $ 2399.04 |
표준 패키지1200/Full Reel | ||
수량이 많을수록 더 좋은 가격?
$
제품 사양
전체
| 타입 | 설명 | |
|---|---|---|
| 카테고리 | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| 제조업체 | MICROCHIP | |
| 포장 | TQFP-64(10x10) | |
| Operating Temperature | -40℃~+85℃ |
| 타입 | 설명 | |
|---|---|---|
| 포장 | TQFP-64(10x10) | |
| Operating Temperature | -40℃~+85℃ |
도움말 및 피드백유사 제품 보기 (0) >
주요 특징
AI 번역
- 128 - 256 Kbytes of Program Flash with ECC and 16 - 32K Data RAM
- Fast 6 - Cycle Divide
- Code Efficient (C and Assembly) Architecture
- 40 - Bit Wide Accumulators Single - Cycle (MAC/MPY) with Dual Data Fetch
- Single - Cycle, Mixed - Sign MUL Plus Hardware Divide
- 32 - Bit Multiply Support
- Five Sets of Interrupt Context Selected Registers for Fast Interrupt Response
- Zero Overhead Looping
- RAM Memory Built - In Self - Test (MBIST)
- 384 Bytes of One - Time - Programmable (OTP) Memory
- Selectable Oscillator Options Including: High - precision, 8 MHz internal Fast RC (FRC) Oscillator; Primary high - speed, crystal/resonator oscillator or external clock; Primary PLL, which can be clocked from FRC or crystal oscillator
- Low - Power Management modes (Sleep and Idle)
- Internal Oscillator
- Programmable PLLs and Oscillator Clock Sources
- Reference Clock Output (REFCLKO)
- Fail - Safe Clock Monitor (FSCM)
- Fast Wake - up and Start - up
- Backup Internal Oscillator
- Low - Power Management Modes (Sleep, Idle, Doze)
- Integrated Power - on Reset and Brown - out Reset
- Four PWM Pairs
- Up to 2 ns PWM Resolution
- Dead Time for Rising and Falling Edges
- Dead - Time Compensation
- Clock Chopping for High - Frequency Operation
- PWM Support for: DC/DC, AC/DC, inverters, PFC, lighting BLDC, PMSM, ACIM, Stepper motors, SRM motors
- Fault and Current Limit Inputs
- Flexible Trigger Configuration for ADC Triggering
- One General Purpose 16 - Bit Timer
- Peripheral Trigger Generator (PTG): Up to 15 trigger sources to other peripheral modules; CPU independent state machine - based instruction sequencer; Two 16 - bit general purpose timers
- Four SCCP modules which Include Timer, Capture/Compare and PWM: Two 16 - bit timers or one 32 - bit timer in each module; PWM resolution down to 2.5 ns (one output per SCCP module); 16 or 32 - bit capture; 4 - deep capture buffer
- Fully Asynchronous Operation, Available in Sleep Modes
- High - Speed ADC module: 12 - bit with one shared SAR ADC core; Configurable resolution (up to 12 - bit); Up to 3.5 Msps conversion rate per channel at 12 - bit resolution; Up to 20 input channels; Dedicated result buffer for each analog channel; Flexible and independent ADC trigger sources; Four digital comparators; Four oversampling filters for increased resolution
- Two Analog Comparators: 15 ns analog comparator
- Up to Three Op Amps: 20 MHz GBW; 40 v/μs slew rate; ±1 mV offset voltage (typical)
- Two 12 - Bit DACs: Hardware slope compensation; One buffered DAC output
- Three Protocol UARTs with Automated Protocol Handling Support for: LIN 2.2; DMX; IrDA
- Two Four - Wire SPI/I2S modules: 16 - byte FIFO; Variable width – I2S mode
- One CAN Flexible Data (FD) module
- One I²C module with SMBus Support
- PPS to Allow Function Remap
- Programmable Cyclic Redundancy Check (CRC)
- One SENT module
- Four DMA Channels
- One Quadrature Encoder Interface (QEI): Four inputs: Phase A, Phase B, Home, Index; One 32 - bit timer/counter (in QEI module, available if encoder is not used)
- Small Pin Count Packages Ranging from 28 to 64 Pins, Including UQFN as Small as 4x4 mm
- High - Current I/O Sink/Source
- Edge or Level Change Notification Interrupt on I/O Pins
- Peripheral Pin Select (PPS) Remappable Pins
- Current Bias Generators
- In - Circuit and In - Application Programming
- Three Complex, Five Simple Breakpoints
- IEEE 1149.2 Compatible (JTAG)
- Boundary Scan
- Trace Buffer and Run - Time Watch
- Backup Fast RC Oscillator (BFRC)
- Brown - out Reset (BOR)
- Capless Internal Voltage Regulator
- Clock Monitor System with Backup Oscillator
- CodeGuard Security
- Cyclic Redundancy Check (CRC)
- Dual Watchdog Timer (WDT)
- Fail - Safe Clock Monitoring (FSCM)
- Flash Error Correcting Code (ECC)
- Flash OTP by ICSP Write Inhibit
- RAM Memory Built - In Self - Test (MBIST)
- Two - Speed Start - up
- Virtual Pins for Redundancy and Monitoring
- Windowed Deadman Timer (DMT)
- AEC - Q100 REV G (Grade 0: - 40°C to + 150°C)
응용 분야
AI 번역
- DC/DC, AC/DC, inverters, PFC, lighting
- BLDC, PMSM, ACIM, Stepper motors, SRM motors
C5624742 EasyEDA 라이브러리
컴플라이언스 & 수출 코드
| 타입 | 세부사항 |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| 타입 | 세부사항 |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| 타입 | 세부사항 |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS | |