ADI AD9751ASTRL
| Manufacturer | |
| MPN | AD9751ASTRL |
| LCSC Part # | C5548708 |
| Packaging | LQFP-48(7x7) |
| Customer # | |
| Key Attributes | AD9751 High Speed TxDAC+ D/A Converter |
| Datasheet | |
| Alternative Parts | 1 |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Data Acquisition/Digital to Analog Converters (DAC) | |
| Manufacturer | ADI | |
| Packaging | LQFP-48(7x7) | |
| Settling Time | 11ns | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 3V~3.6V | |
| Quiescent Current (Iq) | - | |
| Function | Integrated phase-locked loop;Built-in reference source;Differential output | |
| Integral non - linearity | 0.3LSB;0.2LSB | |
| Resolution (Bits) | 10;- | |
| Number of Channels | 1 | |
| Interface Type | - |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Data Acquisition/Digital to Analog Converters (DAC) | |
| Manufacturer | ADI | |
| Packaging | LQFP-48(7x7) | |
| Settling Time | 11ns | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 3V~3.6V |
| Type | Description | |
|---|---|---|
| Quiescent Current (Iq) | - | |
| Function | Integrated phase-locked loop;Built-in reference source;Differential output | |
| Integral non - linearity | 0.3LSB;0.2LSB | |
| Resolution (Bits) | 10;- | |
| Number of Channels | 1 | |
| Interface Type | - |
Introduction
The AD9751 is a dual muxed port, ultrahigh speed, single-channel, 10-bit CMOS DAC. It integrates a high quality 10-bit TxDAC+ core, a voltage reference, and digital interface circuitry into a small 48-lead LQFP package. The AD9751 offers exceptional ac and dc performance while supporting update rates up to 300 MSPS. The AD9751 has been optimized for ultrahigh speed applications up to 300 MSPS where data rates exceed those possible on a single data interface port DAC. The digital interface consists of two buffered latches as well as control logic. These latches can be time multiplexed to the high speed DAC in several ways. This PLL drives the DAC latch at twice the speed of the externally applied clock and is able to interleave the data from the two input channels. The resulting output data rate is twice that of the two input channels. With the PLL disabled, an external 2x clock may be supplied and divided by two internally. The CLK inputs (CLK + /CLK–) can be driven either differentially or single-ended, with a signal swing as low as 1 Vp-p. The DAC utilizes a segmented current source architecture combined with a proprietary switching technique to reduce glitch energy and maximize dynamic accuracy. Differential current outputs support single-ended or differential applications. The differential outputs each provide a nominal full-scale current from 2 mA to 20 mA. The AD9751 is manufactured on an advanced low cost 0.35 µm CMOS process. It operates from a single supply of 3.0 V to 3.6 V and consumes 155 mW of power.
Features
- 10-Bit Dual Muxed Port DAC
- 300 MSPS Output Update Rate
- Excellent SFDR and IMD Performance
- SFDR to Nyquist @ 25 MHz Output: 64 dB
- Internal Clock Doubling PLL
- Differential or Single-Ended Clock Input
- On-Chip 1.2x Reference
- Single 3.3V Supply Operation
- Power Dissipation: 155 mW @ 3.3 V
- 48-Lead LQFP
Applications
- Communications: LMDS, LMCS, MMDS
- Base Stations
- Digital Synthesis
- QAM and OFDM
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 40.1236 | $ 40.12 |
| 200+ | $ 16.0092 | $ 3201.84 |
| 500+ | $ 15.4743 | $ 7737.15 |
| 1,000+ | $ 15.2106 | $ 15210.60 |
Standard Packaging2000/Full Bag | ||
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Data Acquisition/Digital to Analog Converters (DAC) | |
| Manufacturer | ADI | |
| Packaging | LQFP-48(7x7) | |
| Settling Time | 11ns | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 3V~3.6V | |
| Quiescent Current (Iq) | - | |
| Function | Integrated phase-locked loop;Built-in reference source;Differential output | |
| Integral non - linearity | 0.3LSB;0.2LSB | |
| Resolution (Bits) | 10;- | |
| Number of Channels | 1 | |
| Interface Type | - |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Data Acquisition/Digital to Analog Converters (DAC) | |
| Manufacturer | ADI | |
| Packaging | LQFP-48(7x7) | |
| Settling Time | 11ns | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 3V~3.6V |
| Type | Description | |
|---|---|---|
| Quiescent Current (Iq) | - | |
| Function | Integrated phase-locked loop;Built-in reference source;Differential output | |
| Integral non - linearity | 0.3LSB;0.2LSB | |
| Resolution (Bits) | 10;- | |
| Number of Channels | 1 | |
| Interface Type | - |
Introduction
The AD9751 is a dual muxed port, ultrahigh speed, single-channel, 10-bit CMOS DAC. It integrates a high quality 10-bit TxDAC+ core, a voltage reference, and digital interface circuitry into a small 48-lead LQFP package. The AD9751 offers exceptional ac and dc performance while supporting update rates up to 300 MSPS. The AD9751 has been optimized for ultrahigh speed applications up to 300 MSPS where data rates exceed those possible on a single data interface port DAC. The digital interface consists of two buffered latches as well as control logic. These latches can be time multiplexed to the high speed DAC in several ways. This PLL drives the DAC latch at twice the speed of the externally applied clock and is able to interleave the data from the two input channels. The resulting output data rate is twice that of the two input channels. With the PLL disabled, an external 2x clock may be supplied and divided by two internally. The CLK inputs (CLK + /CLK–) can be driven either differentially or single-ended, with a signal swing as low as 1 Vp-p. The DAC utilizes a segmented current source architecture combined with a proprietary switching technique to reduce glitch energy and maximize dynamic accuracy. Differential current outputs support single-ended or differential applications. The differential outputs each provide a nominal full-scale current from 2 mA to 20 mA. The AD9751 is manufactured on an advanced low cost 0.35 µm CMOS process. It operates from a single supply of 3.0 V to 3.6 V and consumes 155 mW of power.
Features
- 10-Bit Dual Muxed Port DAC
- 300 MSPS Output Update Rate
- Excellent SFDR and IMD Performance
- SFDR to Nyquist @ 25 MHz Output: 64 dB
- Internal Clock Doubling PLL
- Differential or Single-Ended Clock Input
- On-Chip 1.2x Reference
- Single 3.3V Supply Operation
- Power Dissipation: 155 mW @ 3.3 V
- 48-Lead LQFP
Applications
- Communications: LMDS, LMCS, MMDS
- Base Stations
- Digital Synthesis
- QAM and OFDM
C5548708 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
Alternative Parts
| MPN | Manufacturer | Packaging | Availability | Unit Price | ||
|---|---|---|---|---|---|---|
| AD9751AST | ADI | LQFP-48(7x7) | 0 | $ 89.3815 |

