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Nexperia 74LVC1G99GS,115 product image
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Nexperia 74LVC1G99GS,115RoHS

Manufacturer
Nexperia
MPN
74LVC1G99GS,115
LCSC Part #
C548463
Packaging
XSON-8(1x1.4)
Customer #
Key Attributes
1.65V~5.5V 32mA 4uA 32mA 1 XSON-8(1x1.4) Gates and Inverters - Multi-Function, Configurable RoHS
Datasheetpdf iconNexperia 74LVC1G99GS,115
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QtyUnit Price(Reference Only)Total Amount
1+$ 0.2785$ 0.28
200+$ 0.1078$ 21.56
500+$ 0.104$ 52.00
1,000+$ 0.1021$ 102.10
Standard Packaging5000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters - Multi-Function, Configurable
ManufacturerNexperia
PackagingXSON-8(1x1.4)
Logic Family74LVC Series
Propagation Delay3.8ns@5.5V,50pF
Voltage - Supply1.65V~5.5V
Operating Temperature-40℃~+125℃
Output Logic Level - Low800mV;300mV;450mV;550mV;100mV
Input Logic Level - Low800mV~1.3V;580mV~1V;300mV~720mV;1.21V~1.9V;1.45V~2.29V
Input Logic Level - High1.5V~2V;1.11V~1.6V;700mV~1.2V;2.16V~2.74V;2.61V~3.33V
Current - Output Low(IOL)32mA
Output Logic Level - High2V;1.9V;1.2V;3.8V
Quiescent Current(Iq)4uA
Current - Output High(IOH)32mA
FeaturesControllable output enable;Overvoltage-tolerant input;Local shutdown mode
Number of Channels1
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Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging5000
Sales UnitPiece

Introduction

AI Translation

The 74LVC1G99 provides a low voltage, ultra-configurable, multiple function gate with 3-state output. The device can be configured as one of several logic functions including, AND, OR, NAND, NOR, XOR, XNOR, inverter, buffer and MUX. No external components are required to configure the device as all inputs can be connected directly to VCC or GND. The 3-state output is controlled by the output enable input (OE). A HIGH level at OE causes the output (Y) to assume a high-impedance OFF-state. When OE is LOW, the output state is determined by the signals applied to the Schmitt trigger inputs (A, B, C and D). Due to the use of Schmitt trigger inputs the device is tolerant of slowly changing input signals, transforming them into sharply defined, jitter free output signals. By eliminating leakage current paths to VCC and GND, the inputs and disabled output are also over-voltage tolerant, making the device suitable for mixed-voltage applications. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74LVC1G99 is fully specified over the supply range from 1.65 V to 5.5 V.

Features

AI Translation
  • Wide supply voltage range from 1.65 V to 5.5 V
  • 5 V tolerant inputs for interfacing with 5 V logic
  • High noise immunity
  • ±24 mA output drive (VCC = 3.0 V)
  • CMOS low power consumption
  • Latch-up performance exceeds 250 mA
  • Direct interface with TTL levels
  • Inputs accept voltages up to 5 V
  • Complies with JEDEC standard: JESD8 - 7 (1.65 V to 1.95 V), JESD8 - 5 (2.3 V to 2.7 V), JESD8 - B/JESD36 (2.7 V to 3.6 V)
  • ESD protection: HBM: ANSI/ESDA/JEDEC JS - 001 class 2 exceeds 2000 V, CDM: ANSI/ESDA/JEDEC JS - 002 class C3 exceeds 1000 V
  • Multiple package options
  • Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃

Applications

AI Translation
  • Mixed-voltage applications
  • 5V logic interfacing
  • Direct TTL level interface