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Nexperia 74HC2G00DP,125 product image
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Nexperia 74HC2G00DP,125RoHS

Manufacturer
Nexperia
MPN
74HC2G00DP,125
LCSC Part #
C546809
Packaging
TSSOP-8
Customer #
Key Attributes
Dual 2-input NAND gate
Datasheetpdf iconNexperia 74HC2G00DP,125
In-Stock: 414
414 In stock, ships now
Add to BOM List
QtyUnit PriceTotal Amount
1+$ 0.5182$ 0.52
10+$ 0.4088$ 4.09
30+$ 0.3621$ 10.86
100+$ 0.3026$ 30.26
500+$ 0.2768$ 138.40
1,000+$ 0.2607$ 260.70
Standard Packaging3000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters
ManufacturerNexperia
PackagingTSSOP-8
Features-
Input Logic Level - Low500mV;1.35V;1.8V
Input Logic Level - High1.5V;3.15V;4.2V
Operating Temperature-40℃~+125℃
Logic Family74HC
Output Logic Level - High1.9V;4.4V;5.9V
Quiescent Current(Iq)20uA
Voltage - Supply2V~6V
Number of Channels2;2
Current - Output High(IOH)5.2mA
Output Logic Level - Low100mV;400mV
Propagation Delay20ns@6V,50pF
Current - Output Low(IOL)5.2mA
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Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging3000
Sales UnitPiece

Introduction

AI Translation

The 74HC2G00; 74HCT2G00 is a dual 2-input NAND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Features

AI Translation
  • Wide supply voltage range from 2.0 V to 6.0 V
  • CMOS low power dissipation
  • Input levels: For 74HC2G00: CMOS level For 74HCT2G00: TTL level
  • Symmetrical output impedance
  • High noise immunity
  • Balanced propagation delays
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • Complies with JEDEC standards: JESD8C (2.7 V to 3.6 V) JESD7A (2.0V to 6.0V)
  • ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃

Applications

AI Translation
  • Logic level translation
  • Signal processing
  • Digital circuit design
  • Low-power applications