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Nexperia 74AVC2T45GN,115 product image
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Nexperia 74AVC2T45GN,115RoHS

Manufacturer
Nexperia
MPN
74AVC2T45GN,115
LCSC Part #
C546260
Packaging
XSON-8(1x1.2)
Customer #
Key Attributes
500Mbps 1 2 XSON-8(1x1.2) Translators, Level Shifters RoHS
Datasheetpdf iconNexperia 74AVC2T45GN,115
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QtyUnit Price(Reference Only)Total Amount
1+$ 0.1668$ 0.17
10+$ 0.1317$ 1.32
30+$ 0.1167$ 3.50
100+$ 0.0979$ 9.79
500+$ 0.0896$ 44.80
1,000+$ 0.0846$ 84.60
Standard Packaging5000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Translators, Level Shifters
ManufacturerNexperia
PackagingXSON-8(1x1.2)
output typeTri-State
Output Signal-
Operating Temperature-40℃~+125℃
Input Signal-
Data Rate500Mbps
Number of Elements1
Channel TypeBidirectional
FeaturesPower-off protection;Output enable high-impedance
Voltage - Supply800mV~3.6V;800mV~3.6V
Number of Circuits2
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Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging5000
Sales UnitPiece

Introduction

AI Translation

The 74AVC2T45 is a dual-bit, dual-supply transceiver that enables bidirectional level translation. It features two data input-output ports (nA and nB), a direction control input (DIR) and dual-supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8 V and 3.6 V making the device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins nA and DIR are referenced to VCC(A) and pins nB are referenced to VCC(B). A HIGH on DIR allows transmission from nA to nB and a LOW on DIR allows transmission from nB to nA. The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In Suspend mode when either VCC(A) or VCC(B) are at GND level, both A and B are in the high-impedance OFF-state.

Features

AI Translation
  • Wide supply voltage range: VCC(A): 0.8 V to 3.6 V VCC(B): 0.8 V to 3.6 V
  • High noise immunity
  • Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.2 V to 1.95 V) JESD8-5 (1.8 V to 2.7 V) JESD8-B (2.7 V to 3.6 V)
  • Maximum data rates: 500 Mbit/s (1.8 V to 3.3 V translation)
  • 320 Mbit/s (<1.8 V to 3.3 V translation)
  • 320 Mbit/s (translate to 2.5 V or 1.8 V)
  • 280 Mbit/s (translate to 1.5 V) 240 Mbit/s (translate to 1.2 V)
  • Suspend mode
  • Latch-up performance exceeds 100 mA per JESD 78 Class II
  • Inputs accept voltages up to 3.6 V
  • Low noise overshoot and undershoot <10 % of VCC
  • IOFF circuitry provides partial Power-down mode operation
  • ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 3B exceeds 8000 V
  • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Multiple package options
  • Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃

Applications

AI Translation
  • Level shifting between low-voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V)
  • Partial power-down applications
  • High-speed data transmission (up to 500 Mbit/s)
  • High noise immunity with low noise overshoot/undershoot
  • JEDEC-compliant applications
  • Applications requiring ESD protection
  • Wide temperature range operation (-40°C to +125°C)
  • Multiple package options available