TI TPS53625RSMR

The TPS53625 device is a driverless, fully SVID-compliant VR12.0 buck controller. Advanced control features such as the D-CAP+ architecture support undershoot reduction (USR) and overshoot reduction (OSR) via overlapping pulses, delivering fast transient response, minimum output capacitance, and high efficiency. The TPS53625 device also supports single-phase operation in either CCM or DCM to improve light-load efficiency. The TPS53625 device integrates complete VR12.0 I/O functionality, including VR_READY (PGOOD), ALERT, and VR_HOT. The SVID interface address is programmable over a range of 0 to 7. Adjustable control of VOUT slew rate and voltage positioning completes the VR12.0 feature set. When used with the TPS51604 FET gate driver, the solution delivers ultra-high speed and low switching losses. The TPS53625 device achieves excellent efficiency when used with selected TI power stage products and DrMOS products. The TPS53625 device operates with a default startup voltage of 1V. By adding an external resistor divider to the design, applications can override the default startup voltage. The TPS53625 device is available in a space-saving, thermally enhanced 32-pin VQFN package and operates over a temperature range of –40°C to 105°C.

• Compliant with VR12.0 Serial VID (SVID) standard
• Single-phase or two-phase operation
• Supports zero load-line and non-zero load-line applications
• 8-bit DAC output range: 0.25 V to 1.52 V
• Optimized efficiency under light-load and heavy-load conditions
• 8-level independent overshoot reduction (OSR) and undershoot reduction (USR)
• Driver-less configuration for efficient high-frequency switching
• Supports discrete, power block, power stage, or DrMOS MOSFET implementations
• Precision adjustable voltage positioning
• Frequency selection from 300 kHz to 1 MHz
• Patented AutoBalance phase balancing
• Optional 8-level current limiting
• 4.5 V to 28 V conversion voltage range
• Compact 4 mm×4 mm 32-pin VQFN PowerPAD IC package

• Core memory