JSMSEMI HEF4017BT,653-JSM

The 4017 is a 5-stage Johnson decade counter featuring ten spike-free decoded active-high outputs (Q0 to Q9), an active-low carry output (Q5-9) from the most significant flip-flop, active-high and active-low clock inputs (CP0, CP1), and an overriding asynchronous master reset input (MR). The counter advances on a low-to-high transition of CP0 when CP1 is low, or on a high-to-low transition of CP1 (overline) when CP0 is high. For cascading counters, the Q5-9 output (low during states 5, 6, 7, 8, and 9) can be used to drive the CP0 input of the next stage. A high level on MR resets the counter to zero (Q0 = Q5·9 = high; Q1 to Q9 = low), independent of the clock inputs (CP0, CP1). Internal circuitry provides automatic counter code correction: following any illegal code, the counter will return to the correct counting sequence within 11 clock pulses. The recommended operating supply voltage range is 3V to 15V, referenced to VSS (typically ground). Unused inputs must be connected to VDD, VSS, or another input.

• Wide supply voltage range: 3V to 15V
• Automatic counter correction
• Tolerant of slow clock rise and fall times
• Available in 5V, 10V, and 15V parametric ratings
• Standardized symmetrical output characteristics
• Operating temperature range: -40℃ ~ +125℃