PUYA P24C512B-SSH-MIR

The P24C512B is a 512- Kbit I²C - compatible Serial EEPROM (Electrically Erasable Programmable Memory) device. It contains a memory array of 64 K × 8 bits, which is organized in 128- byte per page. P24C512B provides the following devices for different application.

• Single Supply Voltage and High Speed
• Minimum operating voltage down to 1.7V
• 1 MHz clock from 2.5V to 5.5V
• 400kHz clock from 1.7V to 2.5V
• Low power CMOS technology
• Read current 500uA, maximum
• Write current 2.5mA, maximum
• Schmitt Trigger, Filtered Inputs for Noise Suppression
• Sequential & Random Read Features
• 128 byte Page Write Modes, Partial Page Writes Allowed
• Write protect of the whole memory array
• Additional Write Lockable Page
• Self- timed Write Cycle (5ms maximum)
• High Reliability
• Endurance: 1 Million Write Cycles
• Data Retention: 100 Years
• HBM: 6KV
• Latch up Capability: +/- 200mA
• Package: PDIP, SOP, TSSOP, and DFN/UDFN